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AArch64
[AArch64] Don't expand memcmp in strict align mode.
2020-04-07 10:53:36 -07:00
AMDGPU
[GlobalISel] Combine sext([sz]ext) -> [sz]ext, zext(zext) -> zext
2020-04-08 11:24:29 +02:00
ARC
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ARM
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
AVR
[AVR] Generalize the previous interrupt bugfix to signal handlers too
2020-03-31 19:33:34 +13:00
BPF
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
Generic
Add MIR-level debugify with only locations support for now
2020-04-07 16:25:13 -07:00
Hexagon
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
Inputs
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Lanai
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MIR
AMDGPU: Assume f32 denormals are enabled by default
2020-04-02 17:17:12 -04:00
MSP430
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Mips
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
NVPTX
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
PowerPC
[NFC][PowerPC] Fix register class for patterns using XXPERMDIs
2020-04-07 14:06:08 -05:00
RISCV
[LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHG
2020-04-01 15:51:26 +01:00
SPARC
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SystemZ
[LoopDataPrefetch + SystemZ] Let target decide on prefetching for each loop.
2020-04-02 14:57:46 +02:00
Thumb
[ARM] unwinding .pad instructions missing in execute-only prologue
2020-04-07 11:51:59 +01:00
Thumb2
[ARM] unwinding .pad instructions missing in execute-only prologue
2020-04-07 11:51:59 +01:00
VE
[VE] Update lea/load/store instructions
2020-04-06 11:49:46 +02:00
WebAssembly
[WebAssembly] EmscriptenEHSjLj: Mark more functions as imported
2020-04-06 21:27:31 -07:00
WinCFGuard
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WinEH
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X86
[X86][SSE] Add PTEST(AND(X,Y),AND(X,Y)) tests derived from PR42035 examples
2020-04-07 17:58:54 +01:00
XCore
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