Alex Lorenz ab4cbcfda7 MIR Serialization: Serialize the simple virtual register allocation hints. ... This commit serializes the virtual register allocations hints of type 0. These hints specify the preferred physical registers for allocations. llvm-svn: 243156		2015-07-24 20:35:40 +00:00
clang	DI: Make getOrCreateLimitedType() return DICompositeType, NFC	2015-07-24 20:34:41 +00:00
clang-tools-extra	misc-unused-parameters: Fix bug where the check was looking at	2015-07-23 17:26:36 +00:00
compiler-rt	__tsan::ThreadCreate takes incorrect value for detached argument	2015-07-24 20:00:49 +00:00
debuginfo-tests	New round of fixes for "Always compile debuginfo-tests for the host triple"	2014-10-18 23:47:59 +00:00
libclc	Fix double implementation of log	2015-07-24 18:07:14 +00:00
libcxx	Detect and throw on a class of bad regexes that we mistakenly accepted before. Thanks to Trevor Smigiel for the report	2015-07-23 18:27:51 +00:00
libcxxabi	Remove include directive for the unused libunwind_ext.h.	2015-07-12 14:47:53 +00:00
libunwind	[libunwind] Flip order of extern "C" and attribute(visibility)	2015-07-24 19:29:05 +00:00
lld	Fix -Wextra-semi.	2015-07-23 23:03:55 +00:00
lldb	Bind to the loopback when we are expecting a connection from 127.0.0.1 so we don't set off firewall protections.	2015-07-24 16:55:00 +00:00
llgo	[llgo] build llgoi by default	2015-07-21 00:47:18 +00:00
llvm	MIR Serialization: Serialize the simple virtual register allocation hints.	2015-07-24 20:35:40 +00:00
openmp	Patch out a fatal assertion in OpenMP runtime until preconditions are met	2015-07-23 18:58:37 +00:00
polly	Make the lit configuration Python 3 compatible	2015-07-24 20:33:22 +00:00