forked from OSchip/llvm-project
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs< %s | FileCheck -enable-var-scope --check-prefix=GCN %s
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; GCN-LABEL: {{^}}global_truncstore_i32_to_i1:
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; GCN: s_load_dword [[LOAD:s[0-9]+]],
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; GCN: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], [[SREG]]
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; GCN: buffer_store_byte [[VREG]],
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define amdgpu_kernel void @global_truncstore_i32_to_i1(i1 addrspace(1)* %out, i32 %val) nounwind {
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%trunc = trunc i32 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; GCN-LABEL: {{^}}global_truncstore_i64_to_i1:
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; GCN: buffer_store_byte
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define amdgpu_kernel void @global_truncstore_i64_to_i1(i1 addrspace(1)* %out, i64 %val) nounwind {
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%trunc = trunc i64 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; FIXME: VGPR on VI
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; GCN-LABEL: {{^}}s_arg_global_truncstore_i16_to_i1:
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; GCN: s_load_dword [[LOAD:s[0-9]+]],
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; GCN: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], [[SREG]]
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; GCN: buffer_store_byte [[VREG]],
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define amdgpu_kernel void @s_arg_global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val) nounwind {
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%trunc = trunc i16 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; GCN-LABEL: {{^}}global_truncstore_i16_to_i1:
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define amdgpu_kernel void @global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val0, i16 %val1) nounwind {
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%add = add i16 %val0, %val1
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%trunc = trunc i16 %add to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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