forked from OSchip/llvm-project
189 lines
7.5 KiB
LLVM
189 lines
7.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}kernel_ieee_mode_default:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_kernel void @kernel_ieee_mode_default() #0 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}kernel_ieee_mode_on:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_kernel void @kernel_ieee_mode_on() #1 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}kernel_ieee_mode_off:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_kernel void @kernel_ieee_mode_off() #2 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}func_ieee_mode_default:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define void @func_ieee_mode_default() #0 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}func_ieee_mode_on:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define void @func_ieee_mode_on() #1 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}func_ieee_mode_off:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
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; GCN-NOT: v_mul_f32
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define void @func_ieee_mode_off() #2 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}cs_ieee_mode_default:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_cs void @cs_ieee_mode_default() #0 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}cs_ieee_mode_on:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_cs void @cs_ieee_mode_on() #1 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}cs_ieee_mode_off:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_cs void @cs_ieee_mode_off() #2 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}ps_ieee_mode_default:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_ps void @ps_ieee_mode_default() #0 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}ps_ieee_mode_on:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET0:v[0-9]+]], 1.0, [[VAL0]]
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; GCN-DAG: v_mul_f32_e32 [[QUIET1:v[0-9]+]], 1.0, [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[QUIET0]], [[QUIET1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_ps void @ps_ieee_mode_on() #1 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}ps_ieee_mode_off:
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; GCN: {{buffer|global|flat}}_load_dword [[VAL0:v[0-9]+]]
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; GCN-NEXT: {{buffer|global|flat}}_load_dword [[VAL1:v[0-9]+]]
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; GCN-NOT: [[VAL0]]
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; GCN-NOT: [[VAL1]]
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; GCN: v_min_f32_e32 [[MIN:v[0-9]+]], [[VAL0]], [[VAL1]]
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; GCN-NOT: v_mul_f32
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define amdgpu_ps void @ps_ieee_mode_off() #2 {
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%val0 = load volatile float, float addrspace(1)* undef
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%val1 = load volatile float, float addrspace(1)* undef
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%min = call float @llvm.minnum.f32(float %val0, float %val1)
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store volatile float %min, float addrspace(1)* undef
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ret void
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}
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declare float @llvm.minnum.f32(float, float) #3
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attributes #0 = { nounwind }
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attributes #1 = { nounwind "amdgpu-ieee"="true" }
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attributes #2 = { nounwind "amdgpu-ieee"="false" }
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attributes #3 = { nounwind readnone speculatable }
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