forked from OSchip/llvm-project
32 lines
1.4 KiB
YAML
32 lines
1.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s
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# The G_ZEXT and G_SHL will be scalarized, introducing a
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# G_UNMERGE_VALUES of G_BUILD_VECTOR. The artifact combiner should
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# eliminate the pair.
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---
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name: revisit_build_vector_unmerge_user
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX9-LABEL: name: revisit_build_vector_unmerge_user
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; GFX9: liveins: $vgpr0_vgpr1
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; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; GFX9: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV]](s32)
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; GFX9: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)
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; GFX9: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[C]](s32)
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; GFX9: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[C]](s32)
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; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SHL]](s64), [[SHL1]](s64)
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; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(s32) = G_CONSTANT i32 2
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%2:_(<2 x s32>) = G_BUILD_VECTOR %1, %1
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%3:_(<2 x s64>) = G_ZEXT %0
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%4:_(<2 x s64>) = G_SHL %3, %2
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %4
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...
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