forked from OSchip/llvm-project
aa8b9993c2
Add partial instruction selection for intrinsics like this: ``` declare i32 @llvm.aarch64.stlxr(i64, i32*) ``` (This only handles the case where a G_ZEXT is feeding the intrinsic.) Also make sure that the added store instruction actually has the memory op from the original G_STORE. Update select-stlxr-intrin.mir and arm64-ldxr-stxr.ll. Differential Revision: https://reviews.llvm.org/D65355 llvm-svn: 367163 |
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clang | ||
clang-tools-extra | ||
compiler-rt | ||
debuginfo-tests | ||
libclc | ||
libcxx | ||
libcxxabi | ||
libunwind | ||
lld | ||
lldb | ||
llgo | ||
llvm | ||
openmp | ||
parallel-libs | ||
polly | ||
pstl | ||
.arcconfig | ||
.clang-format | ||
.clang-tidy | ||
.gitignore | ||
README.md |
README.md
The LLVM Compiler Infrastructure
This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.