forked from OSchip/llvm-project
508 lines
18 KiB
C++
508 lines
18 KiB
C++
//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file defines the WebAssembly-specific subclass of TargetMachine.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssemblyTargetMachine.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "TargetInfo/WebAssemblyTargetInfo.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblyTargetObjectFile.h"
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#include "WebAssemblyTargetTransformInfo.h"
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#include "llvm/CodeGen/MIRParser/MIParser.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/RegAllocRegistry.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Transforms/Scalar/LowerAtomic.h"
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#include "llvm/Transforms/Utils.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm"
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// Emscripten's asm.js-style exception handling
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static cl::opt<bool> EnableEmException(
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"enable-emscripten-cxx-exceptions",
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cl::desc("WebAssembly Emscripten-style exception handling"),
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cl::init(false));
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// Emscripten's asm.js-style setjmp/longjmp handling
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static cl::opt<bool> EnableEmSjLj(
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"enable-emscripten-sjlj",
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cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
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cl::init(false));
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extern "C" void LLVMInitializeWebAssemblyTarget() {
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// Register the target.
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RegisterTargetMachine<WebAssemblyTargetMachine> X(
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getTheWebAssemblyTarget32());
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RegisterTargetMachine<WebAssemblyTargetMachine> Y(
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getTheWebAssemblyTarget64());
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// Register backend passes
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auto &PR = *PassRegistry::getPassRegistry();
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initializeWebAssemblyAddMissingPrototypesPass(PR);
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initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
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initializeLowerGlobalDtorsPass(PR);
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initializeFixFunctionBitcastsPass(PR);
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initializeOptimizeReturnedPass(PR);
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initializeWebAssemblyArgumentMovePass(PR);
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initializeWebAssemblySetP2AlignOperandsPass(PR);
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initializeWebAssemblyReplacePhysRegsPass(PR);
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initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
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initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
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initializeWebAssemblyMemIntrinsicResultsPass(PR);
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initializeWebAssemblyRegStackifyPass(PR);
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initializeWebAssemblyRegColoringPass(PR);
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initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
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initializeWebAssemblyLateEHPreparePass(PR);
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initializeWebAssemblyExceptionInfoPass(PR);
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initializeWebAssemblyCFGSortPass(PR);
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initializeWebAssemblyCFGStackifyPass(PR);
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initializeWebAssemblyExplicitLocalsPass(PR);
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initializeWebAssemblyLowerBrUnlessPass(PR);
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initializeWebAssemblyRegNumberingPass(PR);
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initializeWebAssemblyPeepholePass(PR);
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initializeWebAssemblyCallIndirectFixupPass(PR);
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}
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//===----------------------------------------------------------------------===//
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// WebAssembly Lowering public interface.
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//===----------------------------------------------------------------------===//
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static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
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const Triple &TT) {
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if (!RM.hasValue()) {
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// Default to static relocation model. This should always be more optimial
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// than PIC since the static linker can determine all global addresses and
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// assume direct function calls.
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return Reloc::Static;
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}
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if (!TT.isOSEmscripten()) {
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// Relocation modes other than static are currently implemented in a way
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// that only works for Emscripten, so disable them if we aren't targeting
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// Emscripten.
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return Reloc::Static;
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}
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return *RM;
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}
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/// Create an WebAssembly architecture model.
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///
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WebAssemblyTargetMachine::WebAssemblyTargetMachine(
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const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Optional<Reloc::Model> RM,
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Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
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: LLVMTargetMachine(T,
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TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
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: "e-m:e-p:32:32-i64:64-n32:64-S128",
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TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
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getEffectiveCodeModel(CM, CodeModel::Large), OL),
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TLOF(new WebAssemblyTargetObjectFile()) {
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// WebAssembly type-checks instructions, but a noreturn function with a return
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// type that doesn't match the context will cause a check failure. So we lower
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// LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
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// 'unreachable' instructions which is meant for that case.
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this->Options.TrapUnreachable = true;
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// WebAssembly treats each function as an independent unit. Force
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// -ffunction-sections, effectively, so that we can emit them independently.
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this->Options.FunctionSections = true;
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this->Options.DataSections = true;
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this->Options.UniqueSectionNames = true;
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initAsmInfo();
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// Note that we don't use setRequiresStructuredCFG(true). It disables
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// optimizations than we're ok with, and want, such as critical edge
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// splitting and tail merging.
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}
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WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
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const WebAssemblySubtarget *
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WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
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std::string FS) const {
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auto &I = SubtargetMap[CPU + FS];
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if (!I) {
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I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
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}
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return I.get();
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}
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const WebAssemblySubtarget *
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WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
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Attribute CPUAttr = F.getFnAttribute("target-cpu");
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Attribute FSAttr = F.getFnAttribute("target-features");
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std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
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? CPUAttr.getValueAsString().str()
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: TargetCPU;
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std::string FS = !FSAttr.hasAttribute(Attribute::None)
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? FSAttr.getValueAsString().str()
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: TargetFS;
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// This needs to be done before we create a new subtarget since any
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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return getSubtargetImpl(CPU, FS);
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}
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namespace {
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class CoalesceFeaturesAndStripAtomics final : public ModulePass {
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// Take the union of all features used in the module and use it for each
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// function individually, since having multiple feature sets in one module
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// currently does not make sense for WebAssembly. If atomics are not enabled,
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// also strip atomic operations and thread local storage.
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static char ID;
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WebAssemblyTargetMachine *WasmTM;
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public:
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CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
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: ModulePass(ID), WasmTM(WasmTM) {}
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bool runOnModule(Module &M) override {
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FeatureBitset Features = coalesceFeatures(M);
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std::string FeatureStr = getFeatureString(Features);
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for (auto &F : M)
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replaceFeatures(F, FeatureStr);
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bool StrippedAtomics = false;
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bool StrippedTLS = false;
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if (!Features[WebAssembly::FeatureAtomics])
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StrippedAtomics = stripAtomics(M);
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if (!Features[WebAssembly::FeatureBulkMemory])
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StrippedTLS = stripThreadLocals(M);
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if (StrippedAtomics && !StrippedTLS)
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stripThreadLocals(M);
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else if (StrippedTLS && !StrippedAtomics)
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stripAtomics(M);
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recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
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// Conservatively assume we have made some change
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return true;
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}
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private:
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FeatureBitset coalesceFeatures(const Module &M) {
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FeatureBitset Features =
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WasmTM
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->getSubtargetImpl(WasmTM->getTargetCPU(),
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WasmTM->getTargetFeatureString())
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->getFeatureBits();
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for (auto &F : M)
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Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
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return Features;
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}
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std::string getFeatureString(const FeatureBitset &Features) {
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std::string Ret;
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for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
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if (Features[KV.Value])
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Ret += (StringRef("+") + KV.Key + ",").str();
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}
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return Ret;
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}
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void replaceFeatures(Function &F, const std::string &Features) {
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F.removeFnAttr("target-features");
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F.removeFnAttr("target-cpu");
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F.addFnAttr("target-features", Features);
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}
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bool stripAtomics(Module &M) {
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// Detect whether any atomics will be lowered, since there is no way to tell
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// whether the LowerAtomic pass lowers e.g. stores.
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bool Stripped = false;
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for (auto &F : M) {
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for (auto &B : F) {
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for (auto &I : B) {
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if (I.isAtomic()) {
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Stripped = true;
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goto done;
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}
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}
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}
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}
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done:
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if (!Stripped)
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return false;
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LowerAtomicPass Lowerer;
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FunctionAnalysisManager FAM;
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for (auto &F : M)
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Lowerer.run(F, FAM);
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return true;
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}
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bool stripThreadLocals(Module &M) {
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bool Stripped = false;
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for (auto &GV : M.globals()) {
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if (GV.getThreadLocalMode() !=
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GlobalValue::ThreadLocalMode::NotThreadLocal) {
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Stripped = true;
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GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal);
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}
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}
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return Stripped;
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}
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void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
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for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
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std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
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if (KV.Value == WebAssembly::FeatureAtomics && Stripped) {
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// "atomics" is special: code compiled without atomics may have had its
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// atomics lowered to nonatomic operations. In that case, atomics is
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// disallowed to prevent unsafe linking with atomics-enabled objects.
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assert(!Features[WebAssembly::FeatureAtomics] ||
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!Features[WebAssembly::FeatureBulkMemory]);
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M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
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wasm::WASM_FEATURE_PREFIX_DISALLOWED);
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} else if (Features[KV.Value]) {
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// Otherwise features are marked Used or not mentioned
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M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
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wasm::WASM_FEATURE_PREFIX_USED);
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}
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}
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}
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};
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char CoalesceFeaturesAndStripAtomics::ID = 0;
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/// WebAssembly Code Generator Pass Configuration Options.
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class WebAssemblyPassConfig final : public TargetPassConfig {
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public:
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WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
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: TargetPassConfig(TM, PM) {}
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WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
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return getTM<WebAssemblyTargetMachine>();
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}
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FunctionPass *createTargetRegisterAllocator(bool) override;
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void addIRPasses() override;
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bool addInstSelector() override;
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void addPostRegAlloc() override;
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bool addGCPasses() override { return false; }
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void addPreEmitPass() override;
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// No reg alloc
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bool addRegAssignmentFast() override { return false; }
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// No reg alloc
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bool addRegAssignmentOptimized() override { return false; }
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};
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} // end anonymous namespace
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TargetTransformInfo
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WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) {
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return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
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}
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TargetPassConfig *
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WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
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return new WebAssemblyPassConfig(*this, PM);
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}
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FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
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return nullptr; // No reg alloc
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}
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//===----------------------------------------------------------------------===//
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// The following functions are called from lib/CodeGen/Passes.cpp to modify
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// the CodeGen pass sequence.
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//===----------------------------------------------------------------------===//
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void WebAssemblyPassConfig::addIRPasses() {
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// Runs LowerAtomicPass if necessary
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addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
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// This is a no-op if atomics are not used in the module
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addPass(createAtomicExpandPass());
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// Add signatures to prototype-less function declarations
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addPass(createWebAssemblyAddMissingPrototypes());
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// Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
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addPass(createWebAssemblyLowerGlobalDtors());
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// Fix function bitcasts, as WebAssembly requires caller and callee signatures
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// to match.
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addPass(createWebAssemblyFixFunctionBitcasts());
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// Optimize "returned" function attributes.
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createWebAssemblyOptimizeReturned());
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// If exception handling is not enabled and setjmp/longjmp handling is
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// enabled, we lower invokes into calls and delete unreachable landingpad
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// blocks. Lowering invokes when there is no EH support is done in
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// TargetPassConfig::addPassesToHandleExceptions, but this runs after this
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// function and SjLj handling expects all invokes to be lowered before.
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if (!EnableEmException &&
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TM->Options.ExceptionModel == ExceptionHandling::None) {
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addPass(createLowerInvokePass());
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// The lower invoke pass may create unreachable code. Remove it in order not
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// to process dead blocks in setjmp/longjmp handling.
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addPass(createUnreachableBlockEliminationPass());
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}
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// Handle exceptions and setjmp/longjmp if enabled.
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if (EnableEmException || EnableEmSjLj)
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addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException,
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EnableEmSjLj));
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// Expand indirectbr instructions to switches.
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addPass(createIndirectBrExpandPass());
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TargetPassConfig::addIRPasses();
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}
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bool WebAssemblyPassConfig::addInstSelector() {
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(void)TargetPassConfig::addInstSelector();
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addPass(
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createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
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// Run the argument-move pass immediately after the ScheduleDAG scheduler
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// so that we can fix up the ARGUMENT instructions before anything else
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// sees them in the wrong place.
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addPass(createWebAssemblyArgumentMove());
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// Set the p2align operands. This information is present during ISel, however
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// it's inconvenient to collect. Collect it now, and update the immediate
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// operands.
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addPass(createWebAssemblySetP2AlignOperands());
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return false;
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}
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void WebAssemblyPassConfig::addPostRegAlloc() {
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// TODO: The following CodeGen passes don't currently support code containing
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// virtual registers. Consider removing their restrictions and re-enabling
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// them.
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// These functions all require the NoVRegs property.
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disablePass(&MachineCopyPropagationID);
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disablePass(&PostRAMachineSinkingID);
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disablePass(&PostRASchedulerID);
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disablePass(&FuncletLayoutID);
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disablePass(&StackMapLivenessID);
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disablePass(&LiveDebugValuesID);
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disablePass(&PatchableFunctionID);
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disablePass(&ShrinkWrapID);
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// This pass hurts code size for wasm because it can generate irreducible
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// control flow.
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disablePass(&MachineBlockPlacementID);
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TargetPassConfig::addPostRegAlloc();
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}
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void WebAssemblyPassConfig::addPreEmitPass() {
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TargetPassConfig::addPreEmitPass();
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// Rewrite pseudo call_indirect instructions as real instructions.
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// This needs to run before register stackification, because we change the
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// order of the arguments.
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addPass(createWebAssemblyCallIndirectFixup());
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// Eliminate multiple-entry loops.
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addPass(createWebAssemblyFixIrreducibleControlFlow());
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// Do various transformations for exception handling.
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// Every CFG-changing optimizations should come before this.
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addPass(createWebAssemblyLateEHPrepare());
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// Now that we have a prologue and epilogue and all frame indices are
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// rewritten, eliminate SP and FP. This allows them to be stackified,
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// colored, and numbered with the rest of the registers.
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addPass(createWebAssemblyReplacePhysRegs());
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// Preparations and optimizations related to register stackification.
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if (getOptLevel() != CodeGenOpt::None) {
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// LiveIntervals isn't commonly run this late. Re-establish preconditions.
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addPass(createWebAssemblyPrepareForLiveIntervals());
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// Depend on LiveIntervals and perform some optimizations on it.
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addPass(createWebAssemblyOptimizeLiveIntervals());
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// Prepare memory intrinsic calls for register stackifying.
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addPass(createWebAssemblyMemIntrinsicResults());
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// Mark registers as representing wasm's value stack. This is a key
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// code-compression technique in WebAssembly. We run this pass (and
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// MemIntrinsicResults above) very late, so that it sees as much code as
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// possible, including code emitted by PEI and expanded by late tail
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// duplication.
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addPass(createWebAssemblyRegStackify());
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// Run the register coloring pass to reduce the total number of registers.
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// This runs after stackification so that it doesn't consider registers
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// that become stackified.
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addPass(createWebAssemblyRegColoring());
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}
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// Sort the blocks of the CFG into topological order, a prerequisite for
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// BLOCK and LOOP markers.
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addPass(createWebAssemblyCFGSort());
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// Insert BLOCK and LOOP markers.
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addPass(createWebAssemblyCFGStackify());
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// Insert explicit local.get and local.set operators.
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addPass(createWebAssemblyExplicitLocals());
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// Lower br_unless into br_if.
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addPass(createWebAssemblyLowerBrUnless());
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// Perform the very last peephole optimizations on the code.
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createWebAssemblyPeephole());
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// Create a mapping from LLVM CodeGen virtual registers to wasm registers.
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addPass(createWebAssemblyRegNumbering());
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}
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yaml::MachineFunctionInfo *
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WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
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return new yaml::WebAssemblyFunctionInfo();
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}
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yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
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const MachineFunction &MF) const {
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const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
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return new yaml::WebAssemblyFunctionInfo(*MFI);
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}
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bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
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const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
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SMDiagnostic &Error, SMRange &SourceRange) const {
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const auto &YamlMFI =
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reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
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|
MachineFunction &MF = PFS.MF;
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MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
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return false;
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}
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