forked from OSchip/llvm-project
94 lines
2.9 KiB
ArmAsm
94 lines
2.9 KiB
ArmAsm
@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V8
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@ VCVT{B,T}
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vcvtt.f64.f16 d3, s1
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@ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
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vcvtt.f16.f64 s5, d12
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@ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
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vsel.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselne.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselmi.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselpl.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselvc.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselcs.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselcc.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselhs.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vsello.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselhi.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vsells.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vsellt.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vselle.f32 s3, s4, s6
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@ V8: error: invalid instruction
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vseleq.f32 s0, d2, d1
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@ V8: error: invalid instruction
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vselgt.f64 s3, s2, s1
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@ V8: error: invalid operand for instruction
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vselgt.f32 s0, q3, q1
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@ V8: error: invalid instruction
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vselgt.f64 q0, s3, q1
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@ V8: error: invalid instruction
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vmaxnm.f32 s0, d2, d1
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@ V8: error: invalid instruction
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vminnm.f64 s3, s2, s1
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@ V8: error: invalid operand for instruction
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vmaxnm.f32 s0, q3, q1
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@ V8: error: invalid instruction
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vmaxnm.f64 q0, s3, q1
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@ V8: error: invalid instruction
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vmaxnmgt.f64 q0, s3, q1
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@ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified
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vcvta.s32.f64 d3, s2
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@ V8: error: invalid instruction
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vcvtp.s32.f32 d3, s2
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@ V8: error: operand must be a register in range [s0, s31]
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vcvtn.u32.f64 d3, s2
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@ V8: error: invalid instruction
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vcvtm.u32.f32 d3, s2
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@ V8: error: operand must be a register in range [s0, s31]
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vcvtnge.u32.f64 d3, s2
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@ V8: error: instruction 'vcvtn' is not predicable, but condition code specified
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vcvtbgt.f64.f16 q0, d3
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@ V8: error: invalid instruction
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vcvttlt.f64.f16 s0, s3
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@ V8: error: invalid instruction, any one of the following would fix this:
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@ V8: note: operand must be a register in range [d0, d31]
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@ V8: note: invalid operand for instruction
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vcvttvs.f16.f64 s0, s3
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@ V8: error: invalid instruction, any one of the following would fix this:
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@ V8: note: operand must be a register in range [d0, d31]
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@ V8: note: invalid operand for instruction
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vcvtthi.f16.f64 q0, d3
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@ V8: error: operand must be a register in range [s0, s31]
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vrintrlo.f32.f32 d3, q0
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@ V8: error: invalid instruction
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vrintxcs.f32.f32 d3, d0
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@ V8: error: invalid instruction
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vrinta.f64.f64 s3, q0
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@ V8: error: invalid instruction
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vrintn.f32.f32 d3, d0
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@ V8: error: instruction requires: NEON
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vrintp.f32 q3, q0
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@ V8: error: instruction requires: NEON
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vrintmlt.f32 q3, q0
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@ V8: error: instruction 'vrintm' is not predicable, but condition code specified
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