forked from OSchip/llvm-project
121 lines
3.6 KiB
C++
121 lines
3.6 KiB
C++
//===- MipsInstructionSelector.cpp ------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the InstructionSelector class for
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/// Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "MipsRegisterBankInfo.h"
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#include "MipsTargetMachine.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
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#define DEBUG_TYPE "mips-isel"
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using namespace llvm;
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namespace {
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#define GET_GLOBALISEL_PREDICATE_BITSET
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATE_BITSET
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class MipsInstructionSelector : public InstructionSelector {
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public:
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MipsInstructionSelector(const MipsTargetMachine &TM, const MipsSubtarget &STI,
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const MipsRegisterBankInfo &RBI);
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bool select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const override;
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static const char *getName() { return DEBUG_TYPE; }
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private:
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bool selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
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const MipsTargetMachine &TM;
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const MipsSubtarget &STI;
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const MipsInstrInfo &TII;
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const MipsRegisterInfo &TRI;
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const MipsRegisterBankInfo &RBI;
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#define GET_GLOBALISEL_PREDICATES_DECL
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_DECL
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#define GET_GLOBALISEL_TEMPORARIES_DECL
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_TEMPORARIES_DECL
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};
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} // end anonymous namespace
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#define GET_GLOBALISEL_IMPL
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_IMPL
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MipsInstructionSelector::MipsInstructionSelector(
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const MipsTargetMachine &TM, const MipsSubtarget &STI,
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const MipsRegisterBankInfo &RBI)
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: InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
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TRI(*STI.getRegisterInfo()), RBI(RBI),
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#define GET_GLOBALISEL_PREDICATES_INIT
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_INIT
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#define GET_GLOBALISEL_TEMPORARIES_INIT
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#include "MipsGenGlobalISel.inc"
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#undef GET_GLOBALISEL_TEMPORARIES_INIT
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{
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}
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static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII,
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MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
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const RegisterBankInfo &RBI) {
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unsigned DstReg = I.getOperand(0).getReg();
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if (TargetRegisterInfo::isPhysicalRegister(DstReg))
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return true;
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const TargetRegisterClass *RC = &Mips::GPR32RegClass;
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if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) {
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LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode())
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<< " operand\n");
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return false;
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}
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return true;
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}
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bool MipsInstructionSelector::select(MachineInstr &I,
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CodeGenCoverage &CoverageInfo) const {
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MachineBasicBlock &MBB = *I.getParent();
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MachineFunction &MF = *MBB.getParent();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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if (!isPreISelGenericOpcode(I.getOpcode())) {
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if (I.isCopy())
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return selectCopy(I, TII, MRI, TRI, RBI);
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return true;
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}
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if (selectImpl(I, CoverageInfo)) {
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return true;
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}
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// We didn't select anything.
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return false;
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}
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namespace llvm {
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InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &TM,
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MipsSubtarget &Subtarget,
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MipsRegisterBankInfo &RBI) {
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return new MipsInstructionSelector(TM, Subtarget, RBI);
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}
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} // end namespace llvm
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