forked from OSchip/llvm-project
45 lines
1.7 KiB
LLVM
45 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
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; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9BE
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; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8LE
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; RUN: llc -mcpu=pwr8 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P8BE
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define i8 @scalar_to_vector_half(i16* nocapture readonly %ad) {
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; P9LE-LABEL: scalar_to_vector_half:
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; P9LE: # %bb.0: # %entry
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; P9LE-NEXT: lhz r3, 0(r3)
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; P9LE-NEXT: blr
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;
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; P9BE-LABEL: scalar_to_vector_half:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: lxsihzx v2, 0, r3
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; P9BE-NEXT: li r3, 0
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; P9BE-NEXT: vsplth v2, v2, 3
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; P9BE-NEXT: vextublx r3, r3, v2
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; P9BE-NEXT: blr
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;
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; P8LE-LABEL: scalar_to_vector_half:
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; P8LE: # %bb.0: # %entry
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; P8LE-NEXT: lhz r3, 0(r3)
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; P8LE-NEXT: blr
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;
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; P8BE-LABEL: scalar_to_vector_half:
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; P8BE: # %bb.0: # %entry
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; P8BE-NEXT: lhz r3, 0(r3)
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; P8BE-NEXT: sldi r3, r3, 48
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; P8BE-NEXT: mtfprd f0, r3
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; P8BE-NEXT: mffprd r3, f0
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; P8BE-NEXT: rldicl r3, r3, 8, 56
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; P8BE-NEXT: blr
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entry:
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%0 = bitcast i16* %ad to <2 x i8>*
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%1 = load <2 x i8>, <2 x i8>* %0, align 1
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%2 = extractelement <2 x i8> %1, i32 0
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ret i8 %2
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}
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