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AArch64
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[AArch64][GlobalISel] Mark G_FMINNUM/G_FMAXNUM as floating point opcodes
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2021-08-18 13:32:19 -07:00 |
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AMDGPU
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[AMDGPU] Fix atomic float max/min intrinsics
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2021-08-18 14:12:42 -04:00 |
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ARC
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[ARC] Add codegen for count trailing zeros intrinsic for the ARC backend
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2021-08-10 12:07:35 -07:00 |
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ARM
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Revert "Allow rematerialization of virtual reg uses"
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2021-08-18 00:12:41 -07:00 |
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AVR
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[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'
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2021-08-05 10:37:36 +08:00 |
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BPF
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BPF: avoid NE/EQ loop exit condition
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2021-08-04 16:54:16 -07:00 |
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Generic
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[VP] Add vector-predicated reduction intrinsics
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2021-08-17 17:56:35 +01:00 |
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Hexagon
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[Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs
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2021-07-27 18:36:28 -05:00 |
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Inputs
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Lanai
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[Lanai] fix lowering wide returns
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2021-08-05 21:08:09 -07:00 |
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M68k
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[M68k][GloballSel] RegBankSelect implementation
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2021-08-10 15:24:43 -07:00 |
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MIR
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[X86] AVX512FP16 instructions enabling 1/6
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2021-08-10 12:46:01 +08:00 |
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MSP430
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…
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Mips
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Revert "Allow rematerialization of virtual reg uses"
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2021-08-18 00:12:41 -07:00 |
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NVPTX
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[NVPTX] Add NVPTX intrinsics for CUDA PTX 6.5 ldmatrix instructions
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2021-08-06 16:13:35 -07:00 |
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PowerPC
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[PowerPC] Regenerate 2007-09-08-unaligned.ll test checks
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2021-08-18 19:54:11 +01:00 |
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RISCV
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[RISCV][test] Improve tests for (add (mul x, c1), c2)
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2021-08-19 21:04:35 +08:00 |
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SPARC
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…
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SystemZ
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SystemZ: Tidy up a mir test
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2021-08-10 13:56:54 -04:00 |
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Thumb
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Revert "Allow rematerialization of virtual reg uses"
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2021-08-18 00:12:41 -07:00 |
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Thumb2
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[ARM] Add MVE min/max intrinsic tests. NFC
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2021-08-19 14:33:34 +01:00 |
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VE
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…
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WebAssembly
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[WebAssembly] Autogenerate checks for simd-conversions.ll
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2021-08-17 21:35:23 -07:00 |
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WinCFGuard
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…
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WinEH
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…
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X86
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[X86] Regenerate store_op_load_fold.ll test checks
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2021-08-19 12:42:09 +01:00 |
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XCore
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…
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