forked from OSchip/llvm-project
69 lines
2.1 KiB
C++
69 lines
2.1 KiB
C++
//===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the NVPTX specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXSubtarget.h"
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#include "NVPTXTargetMachine.h"
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using namespace llvm;
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#define DEBUG_TYPE "nvptx-subtarget"
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#define GET_SUBTARGETINFO_ENUM
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "NVPTXGenSubtargetInfo.inc"
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static cl::opt<bool>
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NoF16Math("nvptx-no-f16-math", cl::ZeroOrMore, cl::Hidden,
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cl::desc("NVPTX Specific: Disable generation of f16 math ops."),
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cl::init(false));
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// Pin the vtable to this file.
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void NVPTXSubtarget::anchor() {}
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NVPTXSubtarget &NVPTXSubtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS) {
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// Provide the default CPU if we don't have one.
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TargetName = CPU.empty() ? "sm_20" : CPU;
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ParseSubtargetFeatures(TargetName, FS);
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// Set default to PTX 3.2 (CUDA 5.5)
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if (PTXVersion == 0) {
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PTXVersion = 32;
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}
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return *this;
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}
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NVPTXSubtarget::NVPTXSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS,
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const NVPTXTargetMachine &TM)
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: NVPTXGenSubtargetInfo(TT, CPU, FS), PTXVersion(0), SmVersion(20), TM(TM),
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InstrInfo(), TLInfo(TM, initializeSubtargetDependencies(CPU, FS)),
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FrameLowering() {}
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bool NVPTXSubtarget::hasImageHandles() const {
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// Enable handles for Kepler+, where CUDA supports indirect surfaces and
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// textures
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if (TM.getDrvInterface() == NVPTX::CUDA)
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return (SmVersion >= 30);
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// Disabled, otherwise
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return false;
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}
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bool NVPTXSubtarget::allowFP16Math() const {
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return hasFP16Math() && NoF16Math == false;
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}
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