forked from OSchip/llvm-project
c8ca49659a
when one of them can be converted to a trivial icmp and conditional branch. This addresses what is essentially a phase ordering problem. SimplifyCFG knows how to do this transformation, but it doesn't do so if the primary block has any instructions in it other than an icmp and a branch. In the given testcase, the block contains other instructions, however they are loop-invariant and can be hoisted. SimplifyCFG doesn't have LoopInfo though, so it can't hoist them. And, it's important that the blocks be merged before LoopRotation, as it doesn't support multiple-exit loops. llvm-svn: 74396 |
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| .. | ||
| 2003-04-25-AssertFail.ll | ||
| 2003-05-12-PreheaderExitOfChild.ll | ||
| 2003-08-15-PreheadersFail.ll | ||
| 2003-12-10-ExitBlocksProblem.ll | ||
| 2004-02-05-DominatorInfoCorruption.ll | ||
| 2004-03-15-IncorrectDomUpdate.ll | ||
| 2004-04-01-IncorrectDomUpdate.ll | ||
| 2004-04-12-LoopSimplify-SwitchBackedges.ll | ||
| 2004-04-13-LoopSimplifyUpdateDomFrontier.ll | ||
| 2007-10-28-InvokeCrash.ll | ||
| basictest.ll | ||
| dg.exp | ||
| hardertest.ll | ||
| merge-exits.ll | ||
| phi-node-simplify.ll | ||
| single-backedge.ll | ||