llvm-project/llvm/test/CodeGen
Changpeng Fang 29fcf883fb AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the target has UnpackedD16VMem feature.
Reviewers:
  Matt and Brian

Differential Revision:
  https://reviews.llvm.org/D42548

llvm-svn: 323988
2018-02-01 18:41:33 +00:00
..
AArch64 [AArch64] add tests with sqrt estimate and ieee denorms; NFC 2018-02-01 17:57:45 +00:00
AMDGPU AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the target has UnpackedD16VMem feature. 2018-02-01 18:41:33 +00:00
ARC
ARM [ARM] FullFP16 LowerReturn Fix 2018-02-01 13:48:40 +00:00
AVR Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
BPF Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Generic Move new test from Generic to SystemZ. 2018-01-20 16:57:06 +00:00
Hexagon Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Inputs
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips [mips] Include EVA instructions in Std2MicroMips mapping tables 2018-02-01 12:53:26 +00:00
NVPTX Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
RISCV Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
SPARC [Sparc] Account for bias in stack readjustment 2018-01-29 12:10:32 +00:00
SystemZ [SelectionDAG] Fix UpdateChains handling of TokenFactors 2018-02-01 16:11:59 +00:00
Thumb Revert "[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations" 2018-01-31 22:55:19 +00:00
Thumb2 Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
WebAssembly [SelectionDAG]: Ignore "returned" in the presence of an implicit sret. 2018-01-30 00:14:40 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
X86 [X86][SSE] LowerBUILD_VECTORAsVariablePermute - add support for scaling index vectors 2018-02-01 18:10:30 +00:00
XCore Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00