llvm-project/llvm/test/CodeGen
Craig Topper 38b290f7d7 [X86] Remove patterns for inserting a load into a zero vector.
We can instead block the load folding isProfitableToFold. Then isel will emit a register->register move for the zeroing part and a separate load. The PostProcessISelDAG should be able to remove the register->register move.

This saves us patterns and fixes the fact that we only had unaligned load patterns. The test changes show places where we should have been using an aligned load.

llvm-svn: 336828
2018-07-11 18:09:04 +00:00
..
AArch64 Fix check-prefix vs check-prefixes typo in updated test 2018-07-11 10:42:51 +00:00
AMDGPU AMDGPU: Make hidden argument metadata consistent with 2018-07-10 16:12:51 +00:00
ARC
ARM [ARM] ParallelDSP: multiple reduction stmts in loop 2018-07-11 12:36:25 +00:00
AVR [AVR] Set trackLivenessAfterRegAlloc 2018-06-11 14:46:48 +00:00
BPF
Generic Implement strip.invariant.group 2018-07-02 04:49:30 +00:00
Hexagon [Hexagon] Change .mir testcase to make sure function is not in SSA form 2018-07-10 14:49:54 +00:00
Inputs
Lanai Remove SETCCE use from Lanai's backend 2018-06-03 12:56:24 +00:00
MIR [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property 2018-06-21 10:03:34 +00:00
MSP430 Emit a left-shift instead of a power-of-two multiply for jump-tables 2018-05-16 08:58:26 +00:00
Mips [mips] Fix atomic operations at O0, v3 2018-07-05 09:27:05 +00:00
NVPTX NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
Nios2
PowerPC [Power9] Add remaining __flaot128 builtin support for FMA round to odd 2018-07-11 01:42:22 +00:00
RISCV [RISCV] Add machine function pass to merge base + offset 2018-06-27 20:51:42 +00:00
SPARC NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
SystemZ Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text" 2018-06-22 10:53:47 +00:00
Thumb [ARM] Testcase for Thumb1 cmp with constants. 2018-06-19 00:12:13 +00:00
Thumb2 [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. 2018-07-10 23:44:37 +00:00
WebAssembly [WebAssembly] Add pass to infer prototypes for prototype-less functions 2018-07-11 04:29:36 +00:00
WinCFGuard
WinEH
X86 [X86] Remove patterns for inserting a load into a zero vector. 2018-07-11 18:09:04 +00:00
XCore