| .. |
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arm64-callingconv-ios.ll
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GlobalISel: Fix creating MMOs with align 0
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2019-01-31 01:38:47 +00:00 |
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arm64-callingconv.ll
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[GlobalISel][CallLowering] Add support for splitting types according to calling conventions.
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2019-09-03 21:42:28 +00:00 |
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arm64-fallback.ll
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[GlobalISel] Port some basic undef combines from DAGCombiner.cpp
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2020-03-18 11:05:44 -07:00 |
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arm64-irtranslator-fmuladd.ll
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…
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arm64-irtranslator-gep.ll
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[GlobalISel][IRTranslator] Follow convention and put constant offset of getelementptr arithmetic on RHS.
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2020-01-29 11:37:19 -08:00 |
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arm64-irtranslator-stackprotect.ll
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[GlobalISel] Set stack protector index when translating Intrinsic::stackprotector
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2018-12-10 15:15:05 +00:00 |
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arm64-irtranslator-switch.ll
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[GlobalISel][IRTranslator] Follow convention and put constant offset of getelementptr arithmetic on RHS.
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2020-01-29 11:37:19 -08:00 |
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arm64-irtranslator.ll
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GlobalISel: Define G_READCYCLECOUNTER
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2020-01-04 13:10:19 -05:00 |
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arm64-regbankselect.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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artifact-combine-unmerge.mir
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[GlobalISel] LegalizationArtifactCombiner: Fix a bug in tryCombineMerges
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2020-02-14 10:45:58 -08:00 |
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call-lowering-const-bitcast-func.ll
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[GlobalISel][CallLowering] Look through bitcasts from constant function pointers.
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2020-02-07 15:32:54 -08:00 |
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call-lowering-i128-on-stack.ll
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[AArch64][GlobalISel] Fall back on attempts to allocate split types on the stack.
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2019-09-11 23:53:23 +00:00 |
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call-lowering-i256-crash.ll
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[GlobalISel] Fix a crash when handling an invalid MVT during call lowering.
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2019-04-12 22:05:46 +00:00 |
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call-translator-cse.ll
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[GlobalISel] Tidy up unnecessary calls to createGenericVirtualRegister
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2020-01-31 17:07:16 +00:00 |
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call-translator-ios.ll
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GlobalISel: Set alignment on function argument stack load/store
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2020-03-04 16:38:46 -05:00 |
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call-translator-musttail.ll
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Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"""
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2020-02-13 10:16:06 -08:00 |
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call-translator-tail-call-weak.ll
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[AArch64] [Windows] Use COFF stubs for calls to extern_weak functions
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2019-12-23 12:13:49 +02:00 |
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call-translator-tail-call.ll
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GlobalISel: Set alignment on function argument stack load/store
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2020-03-04 16:38:46 -05:00 |
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call-translator-variadic-musttail.ll
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[AArch64][GlobalISel] Support lowering variadic musttail calls
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2019-09-30 16:49:13 +00:00 |
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call-translator.ll
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GlobalISel: Set alignment on function argument stack load/store
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2020-03-04 16:38:46 -05:00 |
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combine-anyext-crash.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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combine-copy.mir
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[GlobalISel] CombinerHelper: Fix a bug in matchCombineCopy
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2019-12-02 12:05:09 -08:00 |
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combine-fconstant.mir
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[AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS
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2020-01-16 15:18:44 -08:00 |
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combine-mul-to-shl.mir
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[GlobalISel] Add new combine to convert scalar G_MUL to G_SHL.
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2020-01-29 13:39:00 -08:00 |
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combiner-load-store-indexing.ll
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[globalisel] Rename G_GEP to G_PTR_ADD
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2019-11-05 10:31:17 -08:00 |
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const-0.ll
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AArch64: bail instead of asserting on unexpected type in G_CONSTANT 0.
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2019-08-06 13:34:08 +00:00 |
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constant-dbg-loc.ll
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GlobalISel: Preserve load/store metadata in IRTranslator
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2020-01-16 13:49:43 -05:00 |
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contract-store.mir
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[GlobalISel][AArch64] Fix contract cross-bank copies with SIMD instructions
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2020-02-05 10:38:35 -08:00 |
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debug-cpp.ll
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Revert "[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field"
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2020-02-06 14:41:40 +00:00 |
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debug-insts.ll
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Revert "[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field"
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2020-02-06 14:41:40 +00:00 |
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dynamic-alloca-lifetime.ll
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[GlobalISel] Add ISel support for @llvm.lifetime.start and @llvm.lifetime.end
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2019-01-28 19:22:29 +00:00 |
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dynamic-alloca.ll
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[GlobalISel] Replace hard coded dynamic alloca handling with G_DYN_STACKALLOC.
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2019-08-27 19:54:27 +00:00 |
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fallback-nofastisel.ll
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…
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fold-fp-select.mir
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[AArch64][GlobalISel] Don't bail out of the select(cmp(a, b)) -> csel optimization with multiple users.
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2020-01-28 10:09:03 -08:00 |
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fold-select.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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fp16-copy-gpr.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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fp128-legalize-crash-pr35690.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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gisel-abort.ll
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…
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gisel-commandline-option-fastisel.ll
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Rename ExpandISelPseudo->FinalizeISel, delay register reservation
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2019-06-19 00:25:39 +00:00 |
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gisel-commandline-option.ll
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GlobalISel: add combiner to form indexed loads.
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2019-09-09 10:04:23 +00:00 |
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gisel-fail-intermediate-legalizer.ll
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GlobalISel: Implement widenScalar for G_SITOFP/G_UITOFP sources
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2019-10-01 01:06:48 +00:00 |
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inline-asm.ll
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…
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inline-memcpy.mir
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Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
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2019-12-24 15:57:33 -08:00 |
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inline-memmove.mir
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Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
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2019-12-24 15:57:33 -08:00 |
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inline-memset.mir
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Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
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2019-12-24 15:57:33 -08:00 |
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inline-small-memcpy.mir
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[globalisel] Rename G_GEP to G_PTR_ADD
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2019-11-05 10:31:17 -08:00 |
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integration-shuffle-vector.ll
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[GISel][ArtifactCombiner] Relax the constraint to combine unmerge with concat_vectors
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2019-11-06 11:27:50 -08:00 |
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irtranslator-atomic-metadata.ll
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GlobalISel: Apply target MMO flags to atomics
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2020-01-16 13:49:43 -05:00 |
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irtranslator-bitcast.ll
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…
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irtranslator-block-order.ll
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…
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irtranslator-dilocation.ll
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…
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irtranslator-duplicate-types-param.ll
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…
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irtranslator-exceptions.ll
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[globalisel] Rename G_GEP to G_PTR_ADD
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2019-11-05 10:31:17 -08:00 |
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irtranslator-extends.ll
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[globalisel] Add G_SEXT_INREG
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2019-08-09 21:11:20 +00:00 |
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irtranslator-fp-min-max-intrinsics.ll
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GlobalISel: Define the full family of FP min/max instructions
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2019-07-10 16:31:15 +00:00 |
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irtranslator-load-metadata.ll
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GlobalISel: Preserve load/store metadata in IRTranslator
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2020-01-16 13:49:43 -05:00 |
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irtranslator-max-address-space.ll
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GlobalISel: Fix address space limit in LLT
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2019-01-26 01:42:13 +00:00 |
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irtranslator-memfunc-undef.ll
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[GlobalISel] Translate memset/memmove/memcpy from undef ptrs into nops
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2019-06-10 21:53:56 +00:00 |
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irtranslator-split-vector-arg.ll
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[GISel][CallLowering] Enable vector support in argument lowering
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2019-10-11 20:22:57 +00:00 |
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irtranslator-stackprotect-check.ll
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GlobalISel: Preserve load/store metadata in IRTranslator
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2020-01-16 13:49:43 -05:00 |
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irtranslator-store-metadata.ll
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GlobalISel: Preserve load/store metadata in IRTranslator
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2020-01-16 13:49:43 -05:00 |
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irtranslator-tbaa.ll
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[globalisel][irtanslator] The IRTranslator should preserve TBAA information
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2019-11-14 12:11:27 -08:00 |
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irtranslator-volatile-load-pr36018.ll
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[AArch64][GlobalISel] Re-enable selection of volatile loads.
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2018-12-05 00:03:09 +00:00 |
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irtranslator-weird-alloca-size.ll
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[IRTranslator] Use the alloc size instead of the store size when translating allocas
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2019-05-03 01:23:56 +00:00 |
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legalize-add.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-and.mir
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…
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legalize-atomicrmw.mir
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[AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal.
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2019-06-21 16:43:50 +00:00 |
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legalize-blockaddress.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-bswap.mir
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[AArch64][GlobalISel] Tweak legalization rule for G_BSWAP to handle widening s16.
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2019-09-25 04:52:42 +00:00 |
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legalize-build-vector.mir
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[AArch64][GlobalISel] Make <2 x p0> = G_BUILD_VECTOR legal.
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2019-04-10 23:06:14 +00:00 |
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legalize-ceil.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-cmp.mir
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GlobalISel: Allow CSE of G_IMPLICIT_DEF
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2020-02-05 17:47:21 -05:00 |
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legalize-cmpxchg-with-success.mir
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…
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legalize-cmpxchg.mir
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[AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal.
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2019-06-21 16:43:50 +00:00 |
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legalize-combines.mir
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GlobalISel: Combine g_extract with g_merge_values
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2019-02-04 23:41:59 +00:00 |
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legalize-concat-vectors.mir
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[AArch64][GlobalISel] Add some support for G_CONCAT_VECTORS.
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2019-03-14 22:48:15 +00:00 |
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legalize-constant.mir
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[AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal.
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2019-06-21 16:43:50 +00:00 |
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legalize-cos.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-div.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-dyn-alloca.mir
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[update_mir_test_checks] Handle MI flags properly
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2019-10-14 22:01:58 +00:00 |
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legalize-exceptions.ll
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…
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legalize-exp.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-ext-cse.mir
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[GISel]: Change how CSE is enabled by default for each pass
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2019-01-24 23:11:25 +00:00 |
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legalize-ext-csedebug-output.mir
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[GlobalISel] Regex the opcodes in unit test to fix non-deterministic ordering
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2019-02-10 19:53:43 +00:00 |
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legalize-ext.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-extload.mir
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[AArch64][GlobalISel] Make extloads to i64 legal.
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2019-06-04 21:51:34 +00:00 |
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legalize-extract-vector-elt.mir
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[GlobalISel] Restrict G_MERGE_VALUES capability and replace with new opcodes.
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2018-12-10 18:44:58 +00:00 |
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legalize-extracts.mir
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[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
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2019-07-23 22:05:13 +00:00 |
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legalize-fcmp.mir
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…
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legalize-fexp2.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-fma.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-fp-arith.mir
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[AArch64][GlobalISel] Add some missing vector support for FP arithmetic ops.
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2019-01-28 02:28:22 +00:00 |
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legalize-fptoi.mir
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[AArch64][GlobalISel] Add some vector support for fp <-> int conversions.
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2019-01-28 02:27:59 +00:00 |
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legalize-frint.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-ignore-non-generic.mir
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…
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legalize-inserts.mir
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[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
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2019-07-23 22:05:13 +00:00 |
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legalize-intrinsic-round.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-intrinsic-trunc.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-inttoptr-xfail-1.mir
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Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"""
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2020-02-13 10:16:06 -08:00 |
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legalize-inttoptr-xfail-2.mir
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Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"""
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2020-02-13 10:16:06 -08:00 |
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legalize-itofp.mir
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[globalisel] Add G_SEXT_INREG
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2019-08-09 21:11:20 +00:00 |
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legalize-load-store-fewerElts.mir
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[AArch64][GlobalISel] Flesh out vector load/store support for more types.
|
2019-04-11 20:40:01 +00:00 |
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legalize-load-store-vector-of-ptr.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-load-store.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
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legalize-load-trunc.mir
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[GlobalISel] Fix compiler crash lowering G_LOAD in AArch64.
|
2019-12-04 17:04:54 -08:00 |
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legalize-log.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
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legalize-log2.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
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legalize-log10.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
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legalize-memcpy-et-al.mir
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Add an operand to memory intrinsics to denote the "tail" marker.
|
2019-09-28 05:33:21 +00:00 |
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legalize-merge-values.mir
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[Legalizer] Making artifact combining order-independent
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2019-12-13 15:45:18 -08:00 |
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legalize-mul.mir
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…
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legalize-nearbyint.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
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2019-09-11 11:16:48 +00:00 |
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legalize-non-pow2-load-store.mir
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[GlobalISel] Use G_ZEXTLOAD instead of an anyextending load for non-pow-2 legalization.
|
2020-02-06 14:36:36 -08:00 |
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legalize-or.mir
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…
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legalize-phi-insertpt-decrement.mir
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[AArch64] Fix MIR test instruction to not have invalid operand.
|
2019-11-19 13:40:11 -08:00 |
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legalize-phi.mir
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GlobalISel: Allow CSE of G_IMPLICIT_DEF
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2020-02-05 17:47:21 -05:00 |
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legalize-pow.mir
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-property.mir
|
…
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legalize-ptr-add.mir
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[globalisel] Rename G_GEP to G_PTR_ADD
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2019-11-05 10:31:17 -08:00 |
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legalize-rem.mir
|
[globalisel] Add G_SEXT_INREG
|
2019-08-09 21:11:20 +00:00 |
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legalize-s128-div.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-select.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-sext-128.ll
|
[GlobalISel][NFC] Regression test cases for aarch64 legalizer (s128 sext+icmp).
|
2019-09-01 00:45:28 +00:00 |
|
legalize-sext-128.mir
|
[GlobalISel][NFC] Regression test cases for aarch64 legalizer (s128 sext+icmp).
|
2019-09-01 00:45:28 +00:00 |
|
legalize-sext-copy.mir
|
…
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legalize-sext-zext-128.mir
|
GlobalISel: Don't ignore requested ext narrowing type
|
2020-01-16 14:29:37 -05:00 |
|
legalize-sext.mir
|
[globalisel] Add G_SEXT_INREG
|
2019-08-09 21:11:20 +00:00 |
|
legalize-sextload.mir
|
…
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legalize-shift.mir
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[GlobalISel] Fix narrowScalar for shifts to match algorithm from SDAG
|
2019-08-27 14:22:32 +00:00 |
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legalize-shuffle-vector.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-simple.mir
|
[GISel]: Change how CSE is enabled by default for each pass
|
2019-01-24 23:11:25 +00:00 |
|
legalize-sin.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-sqrt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-sub.mir
|
…
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legalize-undef.mir
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[GlobalISel] combine G_TRUNC with G_MERGE_VALUES
|
2020-03-16 14:42:01 +01:00 |
|
legalize-unmerge-values.mir
|
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results
|
2020-01-27 06:18:26 -08:00 |
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legalize-vaarg.mir
|
[globalisel] Rename G_GEP to G_PTR_ADD
|
2019-11-05 10:31:17 -08:00 |
|
legalize-vector-icmp.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
legalize-vector-shift.mir
|
[AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal.
|
2019-09-21 09:21:10 +00:00 |
|
legalize-xor.mir
|
…
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|
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legalize-zextload.mir
|
…
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|
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legalizer-combiner-zext-trunc-crash.mir
|
[Legalizer] Making artifact combining order-independent
|
2019-12-13 15:45:18 -08:00 |
|
legalizer-combiner.mir
|
[GISel][ArtifactCombiner] Relax the constraint to combine unmerge with concat_vectors
|
2019-11-06 11:27:50 -08:00 |
|
legalizer-info-validation.mir
|
Relax newly added opcode checks to check only for a number instead of a specific opcode.
|
2020-03-25 20:15:33 -07:00 |
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lit.local.cfg
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…
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load-addressing-modes.mir
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[AArch64][GlobalISel] Don't reconvert to p0 in convertPtrAddToAdd().
|
2020-02-03 11:50:22 -08:00 |
|
load-wro-addressing-modes.mir
|
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
|
2020-03-05 11:13:02 -08:00 |
|
localizer-arm64-tti.ll
|
[AArch64][GlobalISel] Don't localize TLS G_GLOBAL_VALUEs on Darwin.
|
2020-03-24 13:35:50 -07:00 |
|
localizer-in-O0-pipeline.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
localizer.mir
|
Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses.""
|
2020-03-06 21:35:08 -08:00 |
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machine-cse-mid-pipeline.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
memcpy_chk_no_tail.ll
|
Add an operand to memory intrinsics to denote the "tail" marker.
|
2019-09-28 05:33:21 +00:00 |
|
no-neon-no-fp.ll
|
Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`"""
|
2020-02-13 10:16:06 -08:00 |
|
no-regclass.mir
|
…
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|
|
non-pow-2-extload-combine.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
observer-change-crash.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
opt-and-tbnz-tbz.mir
|
[AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection
|
2020-01-29 13:11:18 -08:00 |
|
opt-fold-and-tbz-tbnz.mir
|
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
|
2020-03-05 11:13:02 -08:00 |
|
opt-fold-compare.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
opt-fold-ext-tbz-tbnz.mir
|
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
|
2020-03-05 11:13:02 -08:00 |
|
opt-fold-shift-tbz-tbnz.mir
|
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
|
2020-03-05 11:13:02 -08:00 |
|
opt-fold-trunc-tbz-tbnz.mir
|
[AArch64][GlobalISel] Walk through G_TRUNC in getTestBitReg
|
2020-01-31 11:09:55 -08:00 |
|
opt-fold-xor-tbz-tbnz.mir
|
[AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation
|
2020-02-03 15:22:24 -08:00 |
|
opt-shuffle-splat.mir
|
[AArch64][GlobalISel] Implement selection of <2 x float> vector splat.
|
2020-01-09 14:05:35 -08:00 |
|
prelegalizercombiner-br.mir
|
[update_mir_test_checks] Handle MI flags properly
|
2019-10-14 22:01:58 +00:00 |
|
prelegalizercombiner-concat-vectors.mir
|
[GISel][CombinerHelper] Add concat_vectors(build_vector, build_vector) => build_vector
|
2019-10-17 00:34:32 +00:00 |
|
prelegalizercombiner-copy-prop-disabled.mir
|
[gicombiner] Add the run-time rule disable option
|
2019-10-17 00:37:04 +00:00 |
|
prelegalizercombiner-extending-loads-cornercases.mir
|
[globalisel] Correct string emitted by GISelChangeObserver::erasingInstr()
|
2019-02-11 20:45:19 +00:00 |
|
prelegalizercombiner-extending-loads-s1.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
prelegalizercombiner-extending-loads.mir
|
[globalisel] Fix iterator invalidation in the extload combines
|
2019-06-17 20:56:31 +00:00 |
|
prelegalizercombiner-ptradd-chain.mir
|
[AArch64][GlobalISel] Fold a chain of two G_PTR_ADDs of constant offsets.
|
2020-01-07 14:12:42 -08:00 |
|
prelegalizercombiner-select.mir
|
[GlobalISel] Combine G_SELECTs of the form (cond ? x : x) into x
|
2020-03-23 16:46:03 -07:00 |
|
prelegalizercombiner-shuffle-vector.mir
|
[GlobalISel] Change representation of shuffle masks in MachineOperand.
|
2020-01-13 16:55:41 -08:00 |
|
prelegalizercombiner-undef.mir
|
[GlobalISel] Port some basic shufflevector undef combines from the DAGCombiner
|
2020-03-19 16:46:06 -07:00 |
|
preselect-process-phis.mir
|
[AArch64][GlobalISel] Fixup <32b heterogeneous regbanks of G_PHIs just before selection.
|
2020-02-26 14:10:32 -08:00 |
|
reg-bank-128bit.mir
|
…
|
|
|
regbank-ceil.ll
|
[GlobalISel][AArch64] Add G_FCEIL to isPreISelGenericFloatingPointOpcode
|
2018-12-20 21:14:15 +00:00 |
|
regbank-extract-vector-elt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-extract.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-fma.mir
|
[update_mir_test_checks] Handle MI flags properly
|
2019-10-14 22:01:58 +00:00 |
|
regbank-fp-use-def.mir
|
[GlobalISel][AArch64] Save a copy on G_SELECT by fixing condition to GPR
|
2019-07-23 21:39:50 +00:00 |
|
regbank-insert-vector-elt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-intrinsic-round.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-intrinsic-trunc.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-nearbyint.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-select.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbank-shift-imm-64.mir
|
[AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms.
|
2019-07-03 01:49:06 +00:00 |
|
regbank-trunc-s128.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbankselect-build-vector.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
regbankselect-dbg-value.mir
|
…
|
|
|
regbankselect-default.mir
|
GlobalISel: Enforce operand types for constants
|
2019-02-04 23:29:31 +00:00 |
|
regbankselect-reg_sequence.mir
|
GlobalISel: Fix RegBankSelect for REG_SEQUENCE
|
2019-03-21 20:45:36 +00:00 |
|
regbankselect-unmerge-vec.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
ret-1x-vec.ll
|
[GlobalISel] Handle <1 x T> vector return types properly.
|
2019-05-06 19:41:01 +00:00 |
|
ret-vec-promote.ll
|
[GlobalISel][AArch64] Allow CallLowering to handle types which are normally
|
2019-04-09 21:22:33 +00:00 |
|
retry-artifact-combine.mir
|
[Legalizer] Making artifact combining order-independent
|
2019-12-13 15:45:18 -08:00 |
|
select-arith-extended-reg.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-arith-shifted-reg.mir
|
[AArch64][GlobalISel] Select patterns which use shifted register operands
|
2019-08-20 22:18:06 +00:00 |
|
select-atomic-load-store.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-atomicrmw.mir
|
[GlobalISel] Import patterns containing SUBREG_TO_REG
|
2019-08-28 20:12:31 +00:00 |
|
select-binop.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-bitcast-bigendian.mir
|
…
|
|
|
select-bitcast.mir
|
…
|
|
|
select-blockaddress.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-br.mir
|
…
|
|
|
select-bswap.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-build-vector.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-cbz.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-ceil.mir
|
[GlobalISel][AArch64] Add isel support for FP16 vector @llvm.ceil
|
2019-01-24 22:00:41 +00:00 |
|
select-cmp.mir
|
[GlobalISel] Import patterns containing SUBREG_TO_REG
|
2019-08-28 20:12:31 +00:00 |
|
select-cmpxchg.mir
|
[GlobalISel] Import patterns containing SUBREG_TO_REG
|
2019-08-28 20:12:31 +00:00 |
|
select-concat-vectors.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-constant.mir
|
[AArch64][GlobalISel] Don't import i64imm_32bit pattern at -O0
|
2019-09-03 17:21:12 +00:00 |
|
select-ctlz.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-dbg-value.mir
|
…
|
|
|
select-extload.mir
|
…
|
|
|
select-extract-vector-elt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-extract.mir
|
[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
|
2019-07-23 22:05:13 +00:00 |
|
select-fabs.mir
|
[GlobalISel][AArch64] Select G_FABS
|
2019-01-30 22:54:21 +00:00 |
|
select-fcmp.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-floor.mir
|
[GlobalISel][AArch64] Select G_FFLOOR
|
2019-02-11 17:22:58 +00:00 |
|
select-fma.mir
|
…
|
|
|
select-fp-casts.mir
|
[AArch64][GlobalISel] Add isel support for a couple vector exts/truncs
|
2019-02-11 18:56:39 +00:00 |
|
select-frameaddr.ll
|
Revert "Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - "[AArch64][GlobalISel]: Support @llvm.{return,frame}address selection.""
|
2020-01-15 10:13:11 -08:00 |
|
select-frint-nofp16.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-frint.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-gv-cmodel-large.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
select-gv-cmodel-tiny.mir
|
Describe stack-id as an enum
|
2019-06-17 09:13:29 +00:00 |
|
select-imm.mir
|
[GlobalISel] Import patterns containing SUBREG_TO_REG
|
2019-08-28 20:12:31 +00:00 |
|
select-implicit-def.mir
|
…
|
|
|
select-insert-extract.mir
|
…
|
|
|
select-insert-vector-elt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-int-ext.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-int-ptr-casts.mir
|
…
|
|
|
select-intrinsic-aarch64-hint.mir
|
…
|
|
|
select-intrinsic-aarch64-sdiv.mir
|
…
|
|
|
select-intrinsic-crypto-aesmc.mir
|
…
|
|
|
select-intrinsic-round.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-intrinsic-trunc.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-jump-table-brjt.mir
|
[update_mir_test_checks] Handle MI flags properly
|
2019-10-14 22:01:58 +00:00 |
|
select-ldaxr-intrin.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-ldxr-intrin.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-load-store-vector-of-ptr.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-load.mir
|
[globalisel] Rename G_GEP to G_PTR_ADD
|
2019-11-05 10:31:17 -08:00 |
|
select-logical-imm.mir
|
[AArch64][GlobalISel] Select logical_imm32 and logical_imm64 patterns
|
2019-08-20 22:31:25 +00:00 |
|
select-logical-shifted-reg.mir
|
[AArch64][GlobalISel] Select patterns which use shifted register operands
|
2019-08-20 22:18:06 +00:00 |
|
select-mul.mir
|
…
|
|
|
select-muladd.mir
|
…
|
|
|
select-nearbyint.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-neon-vcvtfxu2fp.mir
|
…
|
|
|
select-phi.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-pr32733.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-property.mir
|
…
|
|
|
select-redundant-zext-of-load.mir
|
[AArch64][GlobalISel] Eliminate redundant G_ZEXT when the source is implicitly zext-loaded.
|
2019-08-02 21:15:36 +00:00 |
|
select-returnaddr.ll
|
[AArch64][GlobalISel] Fix llvm.returnaddress(0) selection when LR is clobbered.
|
2020-01-21 22:53:32 -08:00 |
|
select-scalar-merge.mir
|
Fix build errors introduced by r349712 on aarch64 bots.
|
2018-12-20 03:27:42 +00:00 |
|
select-scalar-shift-imm.mir
|
[GlobalISel] Import patterns containing SUBREG_TO_REG
|
2019-08-28 20:12:31 +00:00 |
|
select-select.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-sextload.mir
|
…
|
|
|
select-shuffle-vector.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-shufflevec-undef-mask-elt.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-sqrt.mir
|
[GlobalISel][AArch64] Add instruction selection support for @llvm.sqrt
|
2019-01-30 21:03:52 +00:00 |
|
select-stlxr-intrin.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-store.mir
|
[globalisel] Rename G_GEP to G_PTR_ADD
|
2019-11-05 10:31:17 -08:00 |
|
select-stx.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-trap.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-trunc.mir
|
[AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
|
2019-07-23 22:05:13 +00:00 |
|
select-uaddo.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-unmerge.mir
|
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
|
2019-09-11 11:16:48 +00:00 |
|
select-vector-icmp.mir
|
[AArch64][GlobalISel] Add support for selection of vector G_SHL with immediates.
|
2019-12-06 16:24:57 -08:00 |
|
select-vector-shift.mir
|
[AArch64][GlobalISel] Add support for selection of vector G_SHL with immediates.
|
2019-12-06 16:24:57 -08:00 |
|
select-with-no-legality-check.mir
|
[AArch64] Fix over-eager fusing of NEON SIMD MUL/ADD
|
2019-12-03 15:48:37 +00:00 |
|
select-xor.mir
|
…
|
|
|
select-zextload.mir
|
[AArch64][GlobalISel] Eliminate redundant G_ZEXT when the source is implicitly zext-loaded.
|
2019-08-02 21:15:36 +00:00 |
|
select.mir
|
[AArch64][GlobalISel] Don't reconvert to p0 in convertPtrAddToAdd().
|
2020-02-03 11:50:22 -08:00 |
|
store-addressing-modes.mir
|
[globalisel] Rename G_GEP to G_PTR_ADD
|
2019-11-05 10:31:17 -08:00 |
|
store-wro-addressing-modes.mir
|
[GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns
|
2020-01-09 12:15:56 -08:00 |
|
subreg-copy.mir
|
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
|
2020-03-05 11:13:02 -08:00 |
|
swifterror.ll
|
Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses.""
|
2020-03-06 21:35:08 -08:00 |
|
swiftself.ll
|
GlobalISel: support swiftself attribute
|
2019-08-02 14:09:49 +00:00 |
|
tail-call-no-save-fp-lr.ll
|
llc: Don't overwrite frame-pointer attribute
|
2020-01-15 20:56:46 -05:00 |
|
tbnz-slt.mir
|
[AArch64][GlobalISel] Reland SLT/SGT TBNZ optimization
|
2020-02-07 11:15:25 -08:00 |
|
tbz-sgt.mir
|
[AArch64][GlobalISel] Reland SLT/SGT TBNZ optimization
|
2020-02-07 11:15:25 -08:00 |
|
translate-constant-dag.ll
|
Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses.""
|
2020-03-06 21:35:08 -08:00 |
|
translate-gep.ll
|
[GlobalISel][IRTranslator] When translating vector geps, splat the base pointer if required.
|
2020-01-30 16:27:27 -08:00 |
|
translate-inline-asm.ll
|
[GlobalISel][IRTranslator] Add special case support for ~memory inline asm clobber.
|
2020-02-07 08:55:23 -08:00 |
|
unknown-intrinsic.ll
|
…
|
|
|
varargs-ios-translator.ll
|
GlobalISel: Fix creating MMOs with align 0
|
2019-01-31 01:38:47 +00:00 |
|
vastart.ll
|
GlobalISel: Fix creating MMOs with align 0
|
2019-01-31 01:38:47 +00:00 |
|
vec-s16-param.ll
|
[GlobalISel][AArch64] Allow CallLowering to handle types which are normally
|
2019-04-09 21:22:33 +00:00 |
|
widen-narrow-tbz-tbnz.mir
|
[AArch64][GlobalISel] Properly implement widening for TB(N)Z
|
2020-02-12 09:24:58 -08:00 |
d622612e61