forked from OSchip/llvm-project
444 lines
17 KiB
C++
444 lines
17 KiB
C++
//===- LowerVectorTransfers.cpp - LowerVectorTransfers Pass Impl *- C++ -*-===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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//
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// This file implements target-dependent lowering of vector transfer operations.
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//
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//===----------------------------------------------------------------------===//
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#include <type_traits>
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#include "mlir/Analysis/AffineAnalysis.h"
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#include "mlir/Analysis/NestedMatcher.h"
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#include "mlir/Analysis/Utils.h"
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#include "mlir/Analysis/VectorAnalysis.h"
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#include "mlir/EDSC/MLIREmitter.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/AffineMap.h"
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#include "mlir/IR/Attributes.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/Location.h"
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#include "mlir/IR/Matchers.h"
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#include "mlir/IR/OperationSupport.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/Types.h"
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#include "mlir/Pass.h"
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#include "mlir/StandardOps/StandardOps.h"
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#include "mlir/SuperVectorOps/SuperVectorOps.h"
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#include "mlir/Support/Functional.h"
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#include "mlir/Transforms/MLPatternLoweringPass.h"
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#include "mlir/Transforms/Passes.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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///
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/// Implements lowering of VectorTransferReadOp and VectorTransferWriteOp to a
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/// proper abstraction for the hardware.
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///
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/// For now only a simple loop nest is emitted.
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///
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using llvm::dbgs;
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using llvm::SetVector;
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using namespace mlir;
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#define DEBUG_TYPE "lower-vector-transfers"
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namespace {
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/// Helper structure to hold information about loop nest, clipped accesses to
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/// the original scalar MemRef as well as full accesses to temporary MemRef in
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/// local storage.
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struct VectorTransferAccessInfo {
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// `ivs` are bound for `For` Stmt at `For` Stmt construction time.
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llvm::SmallVector<edsc::Expr, 8> ivs;
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llvm::SmallVector<edsc::Expr, 8> lowerBoundsExprs;
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llvm::SmallVector<edsc::Expr, 8> upperBoundsExprs;
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llvm::SmallVector<edsc::Expr, 8> stepExprs;
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llvm::SmallVector<edsc::Expr, 8> clippedScalarAccessExprs;
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llvm::SmallVector<edsc::Expr, 8> tmpAccessExprs;
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};
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template <typename VectorTransferOpTy> class VectorTransferRewriter {
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public:
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/// Perform the rewrite using the `emitter`.
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VectorTransferRewriter(VectorTransferOpTy *transfer,
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MLFuncLoweringRewriter *rewriter,
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MLFuncGlobalLoweringState *state);
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/// Perform the rewrite using the `emitter`.
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void rewrite();
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/// Helper class which creates clipped memref accesses to support lowering of
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/// the vector_transfer operation.
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VectorTransferAccessInfo makeVectorTransferAccessInfo();
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private:
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VectorTransferOpTy *transfer;
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MLFuncLoweringRewriter *rewriter;
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MLFuncGlobalLoweringState *state;
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MemRefType memrefType;
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ArrayRef<int64_t> memrefShape;
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VectorType vectorType;
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ArrayRef<int64_t> vectorShape;
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AffineMap permutationMap;
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/// Used for staging the transfer in a local scalar buffer.
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MemRefType tmpMemRefType;
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/// View of tmpMemRefType as one vector, used in vector load/store to tmp
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/// buffer.
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MemRefType vectorMemRefType;
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// EDSC `emitter` and Exprs that are pre-bound at construction time.
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edsc::MLIREmitter emitter;
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// vectorSizes are bound to the actual constant sizes of vectorType.
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llvm::SmallVector<edsc::Expr, 8> vectorSizes;
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// accesses are bound to transfer->getIndices()
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llvm::SmallVector<edsc::Expr, 8> accesses;
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// `zero` and `one` are bound emitter.zero() and emitter.one().
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// `scalarMemRef` is bound to `transfer->getMemRef()`.
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edsc::Expr zero, one, scalarMemRef;
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};
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} // end anonymous namespace
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/// Consider the case:
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///
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/// ```mlir {.mlir}
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/// // Read the slice `%A[%i0, %i1:%i1+256, %i2:%i2+32]` into
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/// // vector<32x256xf32> and pad with %f0 to handle the boundary case:
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/// %f0 = constant 0.0f : f32
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/// for %i0 = 0 to %0 {
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/// for %i1 = 0 to %1 step 256 {
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/// for %i2 = 0 to %2 step 32 {
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/// %v = vector_transfer_read %A, %i0, %i1, %i2, %f0
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/// {permutation_map: (d0, d1, d2) -> (d2, d1)} :
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/// (memref<?x?x?xf32>, index, index, f32) -> vector<32x256xf32>
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/// }}}
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/// ```
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///
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/// The following constructs the `loadAccessExpr` that supports the emission of
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/// MLIR resembling:
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///
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/// ```mlir
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/// for %d1 = 0 to 256 {
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/// for %d2 = 0 to 32 {
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/// %s = %A[%i0, %i1 + %d1, %i2 + %d2] : f32
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/// %tmp[%d2, %d1] = %s
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/// }
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/// }
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/// ```
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///
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/// Notice in particular the order of loops iterating over the vector size
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/// (i.e. 256x32 instead of 32x256). This results in contiguous accesses along
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/// the most minor dimension of the original scalar tensor. On many hardware
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/// architectures this will result in better utilization of the underlying
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/// memory subsystem (e.g. prefetchers, DMAs, #memory transactions, etc...).
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///
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/// This additionally performs clipping as described in
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/// `VectorTransferRewriter<VectorTransferReadOp>::rewrite` by emitting:
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///
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/// ```mlir-dsc
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/// select(i + ii < zero, zero, select(i + ii < N, i + ii, N - one))
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/// ```
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template <typename VectorTransferOpTy>
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VectorTransferAccessInfo
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VectorTransferRewriter<VectorTransferOpTy>::makeVectorTransferAccessInfo() {
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using namespace mlir::edsc;
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// Create new Exprs for ivs, they will be bound at `For` Stmt
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// construction.
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auto ivs = makeNewExprs(vectorShape.size());
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// Create and bind Exprs to refer to the Value for memref sizes.
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auto memRefSizes = emitter.makeBoundMemRefShape(transfer->getMemRef());
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// Create the edsc::Expr for the clipped and transposes access expressions
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// using the permutationMap. Additionally, capture the index accessing the
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// most minor dimension.
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int coalescingIndex = -1;
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auto clippedScalarAccessExprs = copyExprs(accesses);
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auto tmpAccessExprs = copyExprs(ivs);
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llvm::DenseSet<unsigned> clipped;
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for (auto it : llvm::enumerate(permutationMap.getResults())) {
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if (auto affineExpr = it.value().template dyn_cast<AffineDimExpr>()) {
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auto pos = affineExpr.getPosition();
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auto i = clippedScalarAccessExprs[pos];
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auto ii = ivs[it.index()];
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auto N = memRefSizes[pos];
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clippedScalarAccessExprs[pos] =
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select(i + ii < zero, zero, select(i + ii < N, i + ii, N - one));
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if (pos == clippedScalarAccessExprs.size() - 1) {
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// If a result of the permutation_map accesses the most minor dimension
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// then we record it.
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coalescingIndex = it.index();
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}
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// Temporarily record already clipped accesses to avoid double clipping.
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// TODO(ntv): remove when fully unrolled dimensions are clipped properly.
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clipped.insert(pos);
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} else {
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// Sanity check.
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assert(it.value().template cast<AffineConstantExpr>().getValue() == 0 &&
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"Expected dim or 0 in permutationMap");
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}
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}
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// At this point, fully unrolled dimensions have not been clipped because they
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// do not appear in the permutation map. As a consequence they may access out
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// of bounds. We currently do not have enough information to determine which
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// of those access dimensions have been fully unrolled.
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// Clip one more time to ensure correctness for fully-unrolled dimensions.
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// TODO(ntv): clip just what is needed once we pass the proper information.
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// TODO(ntv): when we get there, also ensure we only clip when dimensions are
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// not divisible (i.e. simple test that can be hoisted outside loop).
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for (unsigned pos = 0; pos < clippedScalarAccessExprs.size(); ++pos) {
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if (clipped.count(pos) > 0) {
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continue;
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}
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auto i = clippedScalarAccessExprs[pos];
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auto N = memRefSizes[pos];
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clippedScalarAccessExprs[pos] =
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select(i < zero, zero, select(i < N, i, N - one));
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}
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// Create the proper bindables for lbs, ubs and steps. Additionally, if we
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// recorded a coalescing index, permute the loop informations.
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auto lbs = makeNewExprs(ivs.size());
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auto ubs = copyExprs(vectorSizes);
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auto steps = makeNewExprs(ivs.size());
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if (coalescingIndex >= 0) {
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std::swap(ivs[coalescingIndex], ivs.back());
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std::swap(lbs[coalescingIndex], lbs.back());
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std::swap(ubs[coalescingIndex], ubs.back());
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std::swap(steps[coalescingIndex], steps.back());
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}
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emitter
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.template bindZipRangeConstants<ConstantIndexOp>(
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llvm::zip(lbs, SmallVector<int64_t, 8>(ivs.size(), 0)))
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.template bindZipRangeConstants<ConstantIndexOp>(
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llvm::zip(steps, SmallVector<int64_t, 8>(ivs.size(), 1)));
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return VectorTransferAccessInfo{ivs,
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copyExprs(lbs),
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ubs,
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copyExprs(steps),
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clippedScalarAccessExprs,
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tmpAccessExprs};
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}
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template <typename VectorTransferOpTy>
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VectorTransferRewriter<VectorTransferOpTy>::VectorTransferRewriter(
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VectorTransferOpTy *transfer, MLFuncLoweringRewriter *rewriter,
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MLFuncGlobalLoweringState *state)
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: transfer(transfer), rewriter(rewriter), state(state),
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memrefType(transfer->getMemRefType()), memrefShape(memrefType.getShape()),
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vectorType(transfer->getVectorType()), vectorShape(vectorType.getShape()),
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permutationMap(transfer->getPermutationMap()),
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tmpMemRefType(
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MemRefType::get(vectorShape, vectorType.getElementType(), {}, 0)),
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vectorMemRefType(MemRefType::get({1}, vectorType, {}, 0)),
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emitter(edsc::MLIREmitter(rewriter->getBuilder(), transfer->getLoc())),
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vectorSizes(edsc::makeNewExprs(vectorShape.size())), zero(emitter.zero()),
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one(emitter.one()) {
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// Bind the Bindable.
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SmallVector<Value *, 8> transferIndices(transfer->getIndices());
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accesses = edsc::makeNewExprs(transferIndices.size());
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emitter.bind(edsc::Bindable(scalarMemRef), transfer->getMemRef())
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.template bindZipRangeConstants<ConstantIndexOp>(
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llvm::zip(vectorSizes, vectorShape))
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.template bindZipRange(llvm::zip(accesses, transfer->getIndices()));
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};
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/// Lowers VectorTransferReadOp into a combination of:
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/// 1. local memory allocation;
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/// 2. perfect loop nest over:
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/// a. scalar load from local buffers (viewed as a scalar memref);
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/// a. scalar store to original memref (with clipping).
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/// 3. vector_load from local buffer (viewed as a memref<1 x vector>);
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/// 4. local memory deallocation.
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///
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/// Lowers the data transfer part of a VectorTransferReadOp while ensuring no
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/// out-of-bounds accesses are possible. Out-of-bounds behavior is handled by
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/// clipping. This means that a given value in memory can be read multiple
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/// times and concurrently.
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///
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/// Important notes about clipping and "full-tiles only" abstraction:
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/// =================================================================
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/// When using clipping for dealing with boundary conditions, the same edge
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/// value will appear multiple times (a.k.a edge padding). This is fine if the
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/// subsequent vector operations are all data-parallel but **is generally
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/// incorrect** in the presence of reductions or extract operations.
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///
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/// More generally, clipping is a scalar abstraction that is expected to work
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/// fine as a baseline for CPUs and GPUs but not for vector_load and DMAs.
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/// To deal with real vector_load and DMAs, a "padded allocation + view"
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/// abstraction with the ability to read out-of-memref-bounds (but still within
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/// the allocated region) is necessary.
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///
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/// Whether using scalar loops or vector_load/DMAs to perform the transfer,
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/// junk values will be materialized in the vectors and generally need to be
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/// filtered out and replaced by the "neutral element". This neutral element is
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/// op-dependent so, in the future, we expect to create a vector filter and
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/// apply it to a splatted constant vector with the proper neutral element at
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/// each ssa-use. This filtering is not necessary for pure data-parallel
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/// operations.
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///
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/// In the case of vector_store/DMAs, Read-Modify-Write will be required, which
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/// also have concurrency implications. Note that by using clipped scalar stores
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/// in the presence of data-parallel only operations, we generate code that
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/// writes the same value multiple time on the edge locations.
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///
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/// TODO(ntv): implement alternatives to clipping.
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/// TODO(ntv): support non-data-parallel operations.
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template <> void VectorTransferRewriter<VectorTransferReadOp>::rewrite() {
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using namespace mlir::edsc;
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// Build the AccessInfo which contain all the information needed to build the
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// perfectly nest loop nest to perform clipped reads and local writes.
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auto accessInfo = makeVectorTransferAccessInfo();
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// clang-format off
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auto &ivs = accessInfo.ivs;
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auto &lbs = accessInfo.lowerBoundsExprs;
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auto &ubs = accessInfo.upperBoundsExprs;
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auto &steps = accessInfo.stepExprs;
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Expr scalarValue, vectorValue, tmpAlloc, tmpDealloc, vectorView;
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Stmt block = edsc::StmtList({
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tmpAlloc = alloc(tmpMemRefType),
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vectorView = vector_type_cast(Expr(tmpAlloc), vectorMemRefType),
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For(ivs, lbs, ubs, steps, {
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scalarValue = load(scalarMemRef, accessInfo.clippedScalarAccessExprs),
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store(scalarValue, tmpAlloc, accessInfo.tmpAccessExprs),
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}),
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vectorValue = load(vectorView, {zero}),
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tmpDealloc = dealloc(tmpAlloc)
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});
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// clang-format on
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// Emit the MLIR.
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emitter.emitStmt(block);
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// Finalize rewriting.
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transfer->replaceAllUsesWith(emitter.getValue(vectorValue));
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transfer->erase();
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}
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/// Lowers VectorTransferWriteOp into a combination of:
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/// 1. local memory allocation;
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/// 2. vector_store to local buffer (viewed as a memref<1 x vector>);
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/// 3. perfect loop nest over:
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/// a. scalar load from local buffers (viewed as a scalar memref);
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/// a. scalar store to original memref (with clipping).
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/// 4. local memory deallocation.
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///
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/// More specifically, lowers the data transfer part while ensuring no
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/// out-of-bounds accesses are possible. Out-of-bounds behavior is handled by
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/// clipping. This means that a given value in memory can be written to multiple
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/// times and concurrently.
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///
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/// See `Important notes about clipping and full-tiles only abstraction` in the
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/// description of `readClipped` above.
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///
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/// TODO(ntv): implement alternatives to clipping.
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/// TODO(ntv): support non-data-parallel operations.
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template <> void VectorTransferRewriter<VectorTransferWriteOp>::rewrite() {
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using namespace mlir::edsc;
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// Build the AccessInfo which contain all the information needed to build the
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// perfectly nest loop nest to perform local reads and clipped writes.
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auto accessInfo = makeVectorTransferAccessInfo();
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// Bind vector value for the vector_transfer_write.
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Expr vectorValue;
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emitter.bind(Bindable(vectorValue), transfer->getVector());
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// clang-format off
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auto &ivs = accessInfo.ivs;
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auto &lbs = accessInfo.lowerBoundsExprs;
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auto &ubs = accessInfo.upperBoundsExprs;
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auto &steps = accessInfo.stepExprs;
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Expr scalarValue, tmpAlloc, tmpDealloc, vectorView;
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Stmt block(edsc::StmtList({
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tmpAlloc = alloc(tmpMemRefType),
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vectorView = vector_type_cast(tmpAlloc, vectorMemRefType),
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store(vectorValue, vectorView, MutableArrayRef<Expr>{zero}),
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For(ivs, lbs, ubs, steps, {
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scalarValue = load(tmpAlloc, accessInfo.tmpAccessExprs),
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store(scalarValue, scalarMemRef, accessInfo.clippedScalarAccessExprs),
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}),
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tmpDealloc = dealloc(tmpAlloc)}));
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// clang-format on
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// Emit the MLIR.
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emitter.emitStmt(block);
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// Finalize rewriting.
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transfer->erase();
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}
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namespace {
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template <typename VectorTransferOpTy>
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class VectorTransferExpander : public MLLoweringPattern {
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public:
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explicit VectorTransferExpander(MLIRContext *context)
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: MLLoweringPattern(VectorTransferOpTy::getOperationName(), 1, context) {}
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PatternMatchResult match(Instruction *op) const override {
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if (m_Op<VectorTransferOpTy>().match(op))
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return matchSuccess();
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return matchFailure();
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}
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void rewriteOpInst(Instruction *op, MLFuncGlobalLoweringState *funcWiseState,
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std::unique_ptr<PatternState> opState,
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MLFuncLoweringRewriter *rewriter) const override {
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VectorTransferRewriter<VectorTransferOpTy>(
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&*op->dyn_cast<VectorTransferOpTy>(), rewriter, funcWiseState)
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.rewrite();
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}
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};
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struct LowerVectorTransfersPass
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: public MLPatternLoweringPass<
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VectorTransferExpander<VectorTransferReadOp>,
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VectorTransferExpander<VectorTransferWriteOp>> {
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LowerVectorTransfersPass()
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: MLPatternLoweringPass(&LowerVectorTransfersPass::passID) {}
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// Thread-safe RAII context with local scope. BumpPtrAllocator freed on exit.
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edsc::ScopedEDSCContext raiiContext;
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static char passID;
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};
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} // end anonymous namespace
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char LowerVectorTransfersPass::passID = 0;
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FunctionPass *mlir::createLowerVectorTransfersPass() {
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return new LowerVectorTransfersPass();
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}
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static PassRegistration<LowerVectorTransfersPass>
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pass("lower-vector-transfers", "Materializes vector transfer ops to a "
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"proper abstraction for the hardware");
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#undef DEBUG_TYPE
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