forked from OSchip/llvm-project
065969ec8e
This change implements the following vector operations: - vclzlsbb vctzlsbb vctzb vctzd vctzh vctzw - vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d - vnegd vnegw - vprtybd vprtybq vprtybw - vbpermd vpermr - vrlwnm vrlwmi vrldnm vrldmi vslv vsrv - vmul10cuq vmul10uq vmul10ecuq vmul10euq 28 instructions Thanks Nemanja, Kit for invaluable hints and discussion! Reviewers: hal, nemanja, kbarton, tjablin, amehsan Phabricator: http://reviews.llvm.org/D15887 llvm-svn: 264504 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
MachO | ||
Markup | ||
Mips | ||
PowerPC | ||
Sparc | ||
SystemZ | ||
X86 |