forked from OSchip/llvm-project
18 lines
364 B
Plaintext
18 lines
364 B
Plaintext
{
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"name": "%1 => %5",
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"context": "{ [] }",
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"statements": [{
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"name": "Stmt_2",
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"domain": "{ Stmt_2[i0] : i0 >= 0 and i0 <= 3 }",
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"schedule": "{ Stmt_2[i0] -> scattering[0, 4i0, 0] }",
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"accesses": [{
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"kind": "read",
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"relation": "{ Stmt_2[i0] -> MemRef_A[i0] }"
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},
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{
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"kind": "write",
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"relation": "{ Stmt_2[i0] -> MemRef_B[i0] }"
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}]
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}]
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}
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