llvm-project/llvm/test/CodeGen
Craig Topper 0b75b39a70 [RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the same content.
Use sed to convert iXLen to i32/i64 before running the test.
2022-03-04 16:34:59 -08:00
..
AArch64 Revert "[AArch64] Async unwind - function prologues" 2022-03-04 17:36:26 +01:00
AMDGPU [AMDGPU] Extra test cases in hard-clauses.mir 2022-03-04 12:46:59 +00:00
ARC
ARM Revert "TLS loads opimization (hoist)" 2022-03-02 14:10:11 +08:00
AVR [AVR] Fix a potential assert failure 2022-02-11 02:25:58 +00:00
BPF [BPF] Fix tests that fail if /tmp/t.c exists 2022-02-25 14:55:53 -08:00
CSKY [CSKY] Add inline asm constraints and related codegen support 2022-02-07 17:45:37 +08:00
Generic [CodeGen][test] XFAIL CodeGen/Generic/ForceStackAlign.ll on SPARC 2022-02-08 08:57:59 +01:00
Hexagon [Hexagon] Fix operation actions for v128f16 2022-02-08 15:28:37 -08:00
Inputs
Lanai
LoongArch [LoongArch] Fix atomic instructions operands sequence 2022-02-19 09:22:10 +08:00
M68k m68k: Support bit shifts on 64-bit integers 2022-02-12 06:11:49 +08:00
MIR [MIRParser] Diagnose too large align values in MachineMemOperands 2022-02-24 15:32:08 +00:00
MLRegalloc [NFC] Fixing test requirements I broke 2022-02-09 09:11:34 -06:00
MSP430
Mips [Mips] support "sp" named register 2022-03-03 13:53:36 -08:00
NVPTX [NVPTX] Fix nvvm.match.sync*.i64 intrinsics return type (i64 -> i32) 2022-03-01 12:26:16 +02:00
PowerPC [PowerPC][atomics] Precommit test cases for i128 cmpxchg. NFC. 2022-03-03 10:47:52 +08:00
RISCV [RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the same content. 2022-03-04 16:34:59 -08:00
SPARC
SystemZ [SystemZ] [z/OS] Add support for generating huge (1 MiB) stack frames in XPLINK64 2022-02-25 02:37:08 -05:00
Thumb [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y). 2022-02-20 21:11:23 -08:00
Thumb2 [SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y). 2022-02-20 21:11:23 -08:00
VE [VE] (masked) load|store v256.32|64 isel 2022-03-02 13:31:29 +01:00
WebAssembly [WebAssembly] Covert llvm/test/MC/WebAssembly/reloc-code.ll to asm. NFC 2022-02-25 07:12:32 -08:00
WinCFGuard
WinEH
X86 [X86] getTargetVShiftNode - peek through any zext node 2022-03-04 17:41:45 +00:00
XCore [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 2022-02-18 16:10:56 +00:00