forked from OSchip/llvm-project
42 lines
1.2 KiB
ArmAsm
42 lines
1.2 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1
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// RUN: ld.lld %t1 --shared -o %t1.so
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// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
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// RUN: ld.lld --hash-style=sysv %t1.so %t.o -o %t
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// RUN: llvm-objdump -s -triple=armv7a-linux-gnueabi %t | FileCheck %s
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// This tls Initial Exec sequence is with respect to a non-preemptible symbol
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// so a relaxation would normally be possible. This would result in an assertion
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// failure on ARM as the relaxation functions can't be implemented on ARM.
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// Check that the sequence is handled as initial exec
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.text
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.syntax unified
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.globl func
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.p2align 2
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.type func,%function
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func:
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.L0:
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.globl __tls_get_addr
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bl __tls_get_addr
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.L1:
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bx lr
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.p2align 2
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.Lt0: .word x1(gottpoff) + (. - .L0 - 8)
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.Lt1: .word x2(gottpoff) + (. - .L1 - 8)
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.globl x1
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.section .trw,"awT",%progbits
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.p2align 2
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x1:
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.word 0x1
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.globl x2
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.section .tbss,"awT",%nobits
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.type x1, %object
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x2:
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.space 4
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.type x2, %object
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// CHECK: Contents of section .got:
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// x1 at offset 0x20 from TP, x2 at offset 0x24 from TP. Offsets include TCB size of 0x20
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// CHECK-NEXT: 13064 20000000 24000000
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