forked from OSchip/llvm-project
63 lines
1.1 KiB
TableGen
63 lines
1.1 KiB
TableGen
// RUN: llvm-tblgen %s | FileCheck %s
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class Register<string name, int idx> {
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string Name = name;
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int Index = idx;
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}
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// CHECK-NOT: !strconcat
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foreach i = 0-3 in
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def Q#i : Register<"Q"#i, i>;
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// CHECK: def Q0
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// CHECK: def Q1
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// CHECK: def Q2
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// CHECK: def Q3
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foreach i = [0, 1, 2, 3, 4, 5, 6, 7] in
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def R#i : Register<"R"#i, i>;
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// CHECK: def R0
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// CHECK: string Name = "R0";
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// CHECK: int Index = 0;
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// CHECK: def R1
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// CHECK: string Name = "R1";
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// CHECK: int Index = 1;
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// CHECK: def R2
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// CHECK: string Name = "R2";
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// CHECK: int Index = 2;
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// CHECK: def R3
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// CHECK: string Name = "R3";
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// CHECK: int Index = 3;
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// CHECK: def R4
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// CHECK: string Name = "R4";
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// CHECK: int Index = 4;
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// CHECK: def R5
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// CHECK: string Name = "R5";
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// CHECK: int Index = 5;
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// CHECK: def R6
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// CHECK: string Name = "R6";
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// CHECK: int Index = 6;
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// CHECK: def R7
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// CHECK: string Name = "R7";
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// CHECK: int Index = 7;
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foreach i = {0-3,9-7} in
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def S#i : Register<"Q"#i, i>;
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// CHECK: def S0
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// CHECK: def S1
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// CHECK: def S2
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// CHECK: def S3
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// CHECK: def S7
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// CHECK: def S8
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// CHECK: def S9
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