Gabor Buella 4a02bf945e [x86] Introduce the enclv instruction ... Summary: and use the -msgx flag as a requirement for the SGX instructions. Reviewers: craig.topper, zvi Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D46436 llvm-svn: 331742		2018-05-08 07:11:05 +00:00
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AArch64	[AArch64] Fix spelling of ICH_ELRSR_EL2 system register	2018-02-06 09:39:04 +00:00
AMDGPU	AMDGPU: Add Vega12 and Vega20	2018-04-30 19:08:16 +00:00
ARC	[ARC] Add LImm support for J/JL	2018-04-13 15:10:34 +00:00
ARM	[ARM]Decoding MSR with unpredictable destination register causes an assert	2018-03-06 15:21:19 +00:00
Hexagon	[Hexagon] Remove trailing spaces, NFC	2017-11-22 20:43:00 +00:00
Lanai	…
Mips	[mips] Add support for Virtualization ASE	2018-04-27 09:12:08 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
Sparc	…
SystemZ	[SystemZ] Add support for IBM z14 processor (3/3)	2017-07-17 17:44:20 +00:00
X86	[x86] Introduce the enclv instruction	2018-05-08 07:11:05 +00:00
XCore	…