forked from OSchip/llvm-project
243 lines
6.1 KiB
LLVM
243 lines
6.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
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define i64 @and1(i64 %x) {
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; CHECK-LABEL: and1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 18446744071562067967 ; clear bit 31
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ret i64 %a
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}
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define i64 @and2(i64 %x) {
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; CHECK-LABEL: and2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-4294967297, %rax # imm = 0xFFFFFFFEFFFFFFFF
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 18446744069414584319 ; clear bit 32
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ret i64 %a
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}
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define i64 @and3(i64 %x) {
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; CHECK-LABEL: and3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-4611686018427387905, %rax # imm = 0xBFFFFFFFFFFFFFFF
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 13835058055282163711 ; clear bit 62
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ret i64 %a
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}
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define i64 @and4(i64 %x) {
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; CHECK-LABEL: and4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
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; CHECK-NEXT: andq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 9223372036854775807 ; clear bit 63
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ret i64 %a
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}
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define i64 @or1(i64 %x) {
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; CHECK-LABEL: or1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 2147483648 ; set bit 31
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ret i64 %a
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}
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define i64 @or2(i64 %x) {
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; CHECK-LABEL: or2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $4294967296, %rax # imm = 0x100000000
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 4294967296 ; set bit 32
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ret i64 %a
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}
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define i64 @or3(i64 %x) {
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; CHECK-LABEL: or3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 4611686018427387904 ; set bit 62
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ret i64 %a
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}
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define i64 @or4(i64 %x) {
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; CHECK-LABEL: or4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; CHECK-NEXT: orq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 9223372036854775808 ; set bit 63
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ret i64 %a
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}
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define i64 @xor1(i64 %x) {
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; CHECK-LABEL: xor1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $2147483648, %eax # imm = 0x80000000
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 2147483648 ; toggle bit 31
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ret i64 %a
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}
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define i64 @xor2(i64 %x) {
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; CHECK-LABEL: xor2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $4294967296, %rax # imm = 0x100000000
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 4294967296 ; toggle bit 32
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ret i64 %a
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}
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define i64 @xor3(i64 %x) {
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; CHECK-LABEL: xor3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $4611686018427387904, %rax # imm = 0x4000000000000000
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 4611686018427387904 ; toggle bit 62
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ret i64 %a
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}
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define i64 @xor4(i64 %x) {
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; CHECK-LABEL: xor4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
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; CHECK-NEXT: xorq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 9223372036854775808 ; toggle bit 63
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ret i64 %a
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}
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define i64 @and1_optsize(i64 %x) optsize {
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; CHECK-LABEL: and1_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btrq $31, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 18446744071562067967 ; clear bit 31
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ret i64 %a
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}
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define i64 @and2_optsize(i64 %x) optsize {
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; CHECK-LABEL: and2_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btrq $32, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 18446744069414584319 ; clear bit 32
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ret i64 %a
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}
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define i64 @and3_optsize(i64 %x) optsize {
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; CHECK-LABEL: and3_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btrq $62, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 13835058055282163711 ; clear bit 62
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ret i64 %a
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}
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define i64 @and4_optsize(i64 %x) optsize {
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; CHECK-LABEL: and4_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btrq $63, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = and i64 %x, 9223372036854775807 ; clear bit 63
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ret i64 %a
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}
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define i64 @or1_optsize(i64 %x) optsize {
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; CHECK-LABEL: or1_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btsq $31, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 2147483648 ; set bit 31
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ret i64 %a
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}
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define i64 @or2_optsize(i64 %x) optsize {
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; CHECK-LABEL: or2_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btsq $32, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 4294967296 ; set bit 32
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ret i64 %a
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}
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define i64 @or3_optsize(i64 %x) optsize {
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; CHECK-LABEL: or3_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btsq $62, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 4611686018427387904 ; set bit 62
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ret i64 %a
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}
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define i64 @or4_optsize(i64 %x) optsize {
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; CHECK-LABEL: or4_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btsq $63, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = or i64 %x, 9223372036854775808 ; set bit 63
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ret i64 %a
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}
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define i64 @xor1_optsize(i64 %x) optsize {
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; CHECK-LABEL: xor1_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btcq $31, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 2147483648 ; toggle bit 31
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ret i64 %a
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}
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define i64 @xor2_optsize(i64 %x) optsize {
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; CHECK-LABEL: xor2_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btcq $32, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 4294967296 ; toggle bit 32
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ret i64 %a
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}
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define i64 @xor3_optsize(i64 %x) optsize {
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; CHECK-LABEL: xor3_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btcq $62, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 4611686018427387904 ; toggle bit 62
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ret i64 %a
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}
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define i64 @xor4_optsize(i64 %x) optsize {
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; CHECK-LABEL: xor4_optsize:
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; CHECK: # %bb.0:
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; CHECK-NEXT: btcq $63, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%a = xor i64 %x, 9223372036854775808 ; toggle bit 63
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ret i64 %a
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}
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