forked from OSchip/llvm-project
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
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define <8 x i16> @foo(<8 x i16> %a, <8 x i16> %b) {
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; SSE-LABEL: foo:
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; SSE: # %bb.0:
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; SSE-NEXT: pcmpeqw %xmm1, %xmm0
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; SSE-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: foo:
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; AVX: # %bb.0:
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; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: retq
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%icmp = icmp eq <8 x i16> %a, %b
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%zext = zext <8 x i1> %icmp to <8 x i16>
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%shl = shl nuw nsw <8 x i16> %zext, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
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ret <8 x i16> %shl
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}
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; Don't fail with an assert due to an undef in the buildvector
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define <8 x i16> @bar(<8 x i16> %a, <8 x i16> %b) {
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; SSE-LABEL: bar:
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; SSE: # %bb.0:
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; SSE-NEXT: pcmpeqw %xmm1, %xmm0
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; SSE-NEXT: pand {{.*}}(%rip), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: bar:
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; AVX: # %bb.0:
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; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: retq
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%icmp = icmp eq <8 x i16> %a, %b
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%zext = zext <8 x i1> %icmp to <8 x i16>
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%shl = shl nuw nsw <8 x i16> %zext, <i16 5, i16 undef, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
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ret <8 x i16> %shl
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}
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