forked from OSchip/llvm-project
50 lines
1.2 KiB
LLVM
50 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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target triple = "i386-unknown-linux-gnu"
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@b = global i16 0, align 4
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define i32 @main() {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: jne .LBB0_3
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; CHECK-NEXT: # %bb.1: # %go
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; CHECK-NEXT: movl $-1, %ecx
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; CHECK-NEXT: movsbl b, %edx
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; CHECK-NEXT: notl %ecx
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; CHECK-NEXT: movzwl %dx, %edx
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; CHECK-NEXT: cmpl $-1, %edx
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; CHECK-NEXT: sbbl %ecx, %eax
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; CHECK-NEXT: jge .LBB0_3
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; CHECK-NEXT: # %bb.2: # %if.then
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB0_3: # %if.else
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retl
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entry:
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%true = icmp eq i32 0, 0
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%const = bitcast i64 -4294967296 to i64
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br i1 %true, label %go, label %if.else
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go:
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%b = load i16, i16* @b, align 4
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%sext = shl i16 %b, 8
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%conv = ashr i16 %sext, 8
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%neg4 = xor i64 %const, -1
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%conv5 = zext i16 %conv to i64
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%cmp = icmp slt i64 %conv5, %neg4
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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ret i32 42
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if.else:
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ret i32 0
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}
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