forked from OSchip/llvm-project
40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
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define float @pr26491(<4 x float> %a0) {
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; SSE2-LABEL: pr26491:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movaps %xmm0, %xmm1
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; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[3,3]
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; SSE2-NEXT: addps %xmm0, %xmm1
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; SSE2-NEXT: movaps %xmm1, %xmm0
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; SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]
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; SSE2-NEXT: addss %xmm1, %xmm0
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: pr26491:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; SSSE3-NEXT: addps %xmm0, %xmm1
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; SSSE3-NEXT: movaps %xmm1, %xmm0
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; SSSE3-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]
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; SSSE3-NEXT: addss %xmm1, %xmm0
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; SSSE3-NEXT: retq
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;
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; AVX-LABEL: pr26491:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; AVX-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%1 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
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%2 = fadd <4 x float> %1, %a0
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%3 = extractelement <4 x float> %2, i32 2
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%4 = extractelement <4 x float> %2, i32 0
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%5 = fadd float %3, %4
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ret float %5
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}
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