forked from OSchip/llvm-project
139 lines
4.1 KiB
LLVM
139 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
|
|
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
|
|
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
|
|
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
|
|
; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
|
|
; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
|
|
|
|
@glob = common local_unnamed_addr global i32 0, align 4
|
|
|
|
; Function Attrs: norecurse nounwind readnone
|
|
define i64 @test_lleqsi(i32 signext %a, i32 signext %b) {
|
|
; CHECK-LABEL: test_lleqsi:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xor r3, r3, r4
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
%conv1 = zext i1 %cmp to i64
|
|
ret i64 %conv1
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind readnone
|
|
define i64 @test_lleqsi_sext(i32 signext %a, i32 signext %b) {
|
|
; CHECK-LABEL: test_lleqsi_sext:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xor r3, r3, r4
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: neg r3, r3
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
%conv1 = sext i1 %cmp to i64
|
|
ret i64 %conv1
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind readnone
|
|
define i64 @test_lleqsi_z(i32 signext %a) {
|
|
; CHECK-LABEL: test_lleqsi_z:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 0
|
|
%conv1 = zext i1 %cmp to i64
|
|
ret i64 %conv1
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind readnone
|
|
define i64 @test_lleqsi_sext_z(i32 signext %a) {
|
|
; CHECK-LABEL: test_lleqsi_sext_z:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: neg r3, r3
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 0
|
|
%conv1 = sext i1 %cmp to i64
|
|
ret i64 %conv1
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
define void @test_lleqsi_store(i32 signext %a, i32 signext %b) {
|
|
; CHECK-LABEL: test_lleqsi_store:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
|
|
; CHECK-NEXT: xor r3, r3, r4
|
|
; CHECK-NEXT: ld r12, .LC0@toc@l(r5)
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: stw r3, 0(r12)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
%conv = zext i1 %cmp to i32
|
|
store i32 %conv, i32* @glob, align 4
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
define void @test_lleqsi_sext_store(i32 signext %a, i32 signext %b) {
|
|
; CHECK-LABEL: test_lleqsi_sext_store:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: xor r3, r3, r4
|
|
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: ld r4, .LC0@toc@l(r5)
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: neg r3, r3
|
|
; CHECK-NEXT: stw r3, 0(r4)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
%sub = sext i1 %cmp to i32
|
|
store i32 %sub, i32* @glob, align 4
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
define void @test_lleqsi_z_store(i32 signext %a) {
|
|
; CHECK-LABEL: test_lleqsi_z_store:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: stw r3, 0(r4)
|
|
; CHECK-NEXT: blr
|
|
; CHECKNEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 0
|
|
%conv = zext i1 %cmp to i32
|
|
store i32 %conv, i32* @glob, align 4
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: norecurse nounwind
|
|
define void @test_lleqsi_sext_z_store(i32 signext %a) {
|
|
; CHECK-LABEL: test_lleqsi_sext_z_store:
|
|
; CHECK: # %bb.0: # %entry
|
|
; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
|
|
; CHECK-NEXT: cntlzw r3, r3
|
|
; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
|
|
; CHECK-NEXT: srwi r3, r3, 5
|
|
; CHECK-NEXT: neg r3, r3
|
|
; CHECK-NEXT: stw r3, 0(r4)
|
|
; CHECK-NEXT: blr
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 0
|
|
%sub = sext i1 %cmp to i32
|
|
store i32 %sub, i32* @glob, align 4
|
|
ret void
|
|
}
|