forked from OSchip/llvm-project
26 lines
623 B
LLVM
26 lines
623 B
LLVM
; RUN: llc -march=hexagon -O2 -relocation-model=pic < %s | FileCheck %s
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; CHECK: add({{pc|PC}},##_GLOBAL_OFFSET_TABLE_@PCREL)
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; CHECK: call g1@GDPLT
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; CHECK: call g0@GDPLT
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@g0 = external thread_local global i32
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@g1 = external thread_local global i32
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; Function Attrs: nounwind
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define i32 @f0() #0 {
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b0:
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%v0 = load i32, i32* @g1, align 4, !tbaa !0
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store i32 %v0, i32* @g0, align 4, !tbaa !0
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tail call void @f1(i32 %v0) #0
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ret i32 0
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}
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declare void @f1(i32)
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attributes #0 = { nounwind "target-cpu"="hexagonv5" }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2}
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!2 = !{!"omnipotent char", !3}
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!3 = !{!"Simple C/C++ TBAA"}
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