forked from OSchip/llvm-project
68 lines
2.5 KiB
LLVM
68 lines
2.5 KiB
LLVM
; RUN: llc -march=hexagon -enable-pipeliner -stats \
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; RUN: -pipeliner-prune-loop-carried=false -fp-contract=fast \
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; RUN: -o /dev/null < %s 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; That that we do not pipeline this loop. The recurrence is too large. If
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; we pipeline this example, that means we're not checking the complete
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; chain of dependences.
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; STATS-NOT: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind
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define void @f0(i32 %a0, i32 %a1, double %a2, double %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, [1000 x i8]* %a9, [1000 x i8]* %a10, [1000 x i8]* %a11) #0 {
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b0:
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br i1 undef, label %b1, label %b4
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b1: ; preds = %b3, %b0
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br label %b2
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b2: ; preds = %b2, %b1
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%v0 = phi i8* [ %v22, %b2 ], [ %a5, %b1 ]
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%v1 = phi i8* [ %v23, %b2 ], [ %a6, %b1 ]
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%v2 = phi i8* [ %v24, %b2 ], [ %a7, %b1 ]
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%v3 = phi i32 [ %v20, %b2 ], [ 0, %b1 ]
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%v4 = load i8, i8* %v0, align 1, !tbaa !0
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%v5 = zext i8 %v4 to i32
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%v6 = load i8, i8* %v1, align 1, !tbaa !0
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%v7 = sext i8 %v6 to i32
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%v8 = load i8, i8* %v2, align 1, !tbaa !0
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%v9 = sext i8 %v8 to i32
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%v10 = mul nsw i32 %v9, %v7
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%v11 = add nsw i32 %v10, %v5
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%v12 = trunc i32 %v11 to i8
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store i8 %v12, i8* undef, align 1, !tbaa !0
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%v13 = load i8, i8* %v2, align 1, !tbaa !0
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%v14 = sext i8 %v13 to i32
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%v15 = load i8, i8* undef, align 1, !tbaa !0
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%v16 = sext i8 %v15 to i32
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%v17 = mul nsw i32 %v16, %v14
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%v18 = add i32 %v17, %v11
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%v19 = trunc i32 %v18 to i8
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store i8 %v19, i8* %v0, align 1, !tbaa !0
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%v20 = add nsw i32 %v3, 1
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store i8 0, i8* undef, align 1, !tbaa !0
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%v21 = icmp eq i32 %v20, undef
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%v22 = getelementptr i8, i8* %v0, i32 1
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%v23 = getelementptr i8, i8* %v1, i32 1
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%v24 = getelementptr i8, i8* %v2, i32 1
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br i1 %v21, label %b3, label %b2
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b3: ; preds = %b2
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tail call void @f1(i32 %a1, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, [1000 x i8]* %a9, [1000 x i8]* %a10, [1000 x i8]* %a11, i8 signext 1) #2
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br i1 undef, label %b4, label %b1
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b4: ; preds = %b3, %b0
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ret void
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}
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declare void @f1(i32, i8*, i8*, i8*, i8*, i8*, [1000 x i8]*, [1000 x i8]*, [1000 x i8]*, i8 signext) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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attributes #1 = { "target-cpu"="hexagonv55" }
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attributes #2 = { nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2, i64 0}
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!2 = !{!"Simple C/C++ TBAA"}
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