forked from OSchip/llvm-project
25 lines
634 B
LLVM
25 lines
634 B
LLVM
; RUN: llc -march=hexagon -O2 -hexagon-expand-condsets=true -hexagon-gen-mux-threshold=4 < %s | FileCheck %s
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; CHECK-NOT: mux(p
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target triple = "hexagon"
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define void @f0() #0 {
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b0:
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%v0 = load i32, i32* null, align 4
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%v1 = icmp slt i32 undef, %v0
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%v2 = zext i1 %v1 to i32
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%v3 = icmp sgt i32 undef, 0
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%v4 = zext i1 %v3 to i32
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%v5 = add nsw i32 %v2, %v4
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store i32 %v5, i32* undef, align 4
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b0
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br label %b2
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b2: ; preds = %b1, %b0
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unreachable
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}
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attributes #0 = { nounwind }
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