forked from OSchip/llvm-project
39 lines
1.2 KiB
LLVM
39 lines
1.2 KiB
LLVM
; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
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; Check for sane output.
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; CHECK: vmpyweh
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target triple = "hexagon"
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declare i32 @llvm.hexagon.S2.clb(i32) #0
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declare i32 @llvm.hexagon.S2.asl.r.r(i32, i32) #0
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declare i32 @llvm.hexagon.S2.vrndpackwh(i64) #0
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declare i64 @llvm.hexagon.M2.mmpyl.s1(i64, i64) #0
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define i64 @fred(i32 %a0, i32 %a1) local_unnamed_addr #1 {
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b2:
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br i1 undef, label %b15, label %b3
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b3: ; preds = %b2
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%v4 = tail call i32 @llvm.hexagon.S2.clb(i32 %a1) #0
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%v5 = add nsw i32 %v4, -32
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%v6 = zext i32 %v5 to i64
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%v7 = shl nuw i64 %v6, 32
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%v8 = or i64 %v7, 0
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%v9 = tail call i32 @llvm.hexagon.S2.asl.r.r(i32 %a0, i32 0)
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%v10 = tail call i32 @llvm.hexagon.S2.vrndpackwh(i64 %v8)
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%v11 = sext i32 %v9 to i64
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%v12 = sext i32 %v10 to i64
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%v13 = tail call i64 @llvm.hexagon.M2.mmpyl.s1(i64 %v11, i64 %v12)
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%v14 = and i64 %v13, 4294967295
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br label %b15
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b15: ; preds = %b3, %b2
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%v16 = phi i64 [ %v14, %b3 ], [ 0, %b2 ]
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%v17 = or i64 0, %v16
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ret i64 %v17
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind "target-cpu"="hexagonv55" }
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