forked from OSchip/llvm-project
29 lines
801 B
LLVM
29 lines
801 B
LLVM
; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
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; CHECK-NOT: sxth
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target triple = "hexagon"
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@g0 = common global i32 0, align 4
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define i32 @f0(i32 %a0, i32 %a1) {
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b0:
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%v0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %a0, i32 %a1)
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%v1 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %a1, i32 %a0)
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%v2 = shl i32 %v0, 16
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%v3 = ashr exact i32 %v2, 16
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%v4 = shl i32 %v1, 16
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%v5 = ashr exact i32 %v4, 16
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%v6 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %v0, i32 %v1)
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%v7 = shl i32 %v6, 16
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%v8 = ashr exact i32 %v7, 16
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%v9 = load i32, i32* @g0, align 4
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%v10 = icmp ne i32 %v9, %v6
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%v11 = zext i1 %v10 to i32
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ret i32 %v11
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32, i32) #0
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attributes #0 = { nounwind readnone }
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