forked from OSchip/llvm-project
83 lines
2.1 KiB
LLVM
83 lines
2.1 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; Check that there are no packets with two or more instructions, except
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; for the endloop packet.
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; This is the expected code:
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;
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; p0 = cmp.gt(r3,#0)
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; if (!p0) jump:nt .LBB0_3
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; loop0(.LBB0_2,r3)
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; r3 = memw(r1++#4)
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; r4 = memw(r2++#4)
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; r3 = add(r4,r3)
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; memw(r0++#4) = r3
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; { nop; nop }:endloop0
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; jumpr r31
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; CHECK-LABEL: fred:
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; CHECK: {
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; CHECK-NEXT: cmp
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: jump
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: loop0
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: memw
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: memw
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: add
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: memw
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; CHECK-NEXT: }
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; CHECK: {
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: }{{[ \t]*}}:endloop0
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; CHECK: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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target triple = "hexagon"
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define void @fred(i32* nocapture %a0, i32* nocapture readonly %a1, i32* nocapture readonly %a2, i32 %a3) local_unnamed_addr #0 {
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b4:
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%v5 = icmp sgt i32 %a3, 0
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br i1 %v5, label %b6, label %b21
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b6: ; preds = %b4
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br label %b7
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b7: ; preds = %b7, %b6
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%v8 = phi i32 [ %v18, %b7 ], [ 0, %b6 ]
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%v9 = phi i32* [ %v17, %b7 ], [ %a0, %b6 ]
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%v10 = phi i32* [ %v14, %b7 ], [ %a2, %b6 ]
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%v11 = phi i32* [ %v12, %b7 ], [ %a1, %b6 ]
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%v12 = getelementptr inbounds i32, i32* %v11, i32 1
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%v13 = load i32, i32* %v11, align 4
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%v14 = getelementptr inbounds i32, i32* %v10, i32 1
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%v15 = load i32, i32* %v10, align 4
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%v16 = add nsw i32 %v15, %v13
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%v17 = getelementptr inbounds i32, i32* %v9, i32 1
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store i32 %v16, i32* %v9, align 4
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%v18 = add nuw nsw i32 %v8, 1
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%v19 = icmp eq i32 %v18, %a3
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br i1 %v19, label %b20, label %b7
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b20: ; preds = %b7
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br label %b21
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b21: ; preds = %b20, %b4
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ret void
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}
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attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="-packets" }
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