llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s
--- |
define void @test_add() { ret void }
...
---
name: test_add
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: test_add
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
%0(s32) = COPY $vgpr0
%1(s32) = COPY $vgpr1
%2(s32) = G_ADD %0, %1
$vgpr0 = COPY %2
...