Amara Emerson f79d3bc724 [GlobalISel] Add a G_BRJT opcode. ... This is a branch opcode that takes a jump table pointer, jump table index and an index into the table to do an indirect branch. We pass both the table pointer and JTI to allow targets like ARM64 to more easily use the existing jump table compression optimization without having to walk up the block to find a paired G_JUMP_TABLE. Differential Revision: https://reviews.llvm.org/D63159 llvm-svn: 363434		2019-06-14 17:55:48 +00:00
..
test_copy.mir	…
test_copy_mismatch_types.mir	…
test_g_add.mir	…
test_g_addrspacecast.mir	…
test_g_bitcast.mir	…
test_g_brjt.mir	[GlobalISel] Add a G_BRJT opcode.	2019-06-14 17:55:48 +00:00
test_g_build_vector.mir	…
test_g_build_vector_trunc.mir	…
test_g_concat_vectors.mir	…
test_g_constant.mir	…
test_g_extract.mir	…
test_g_fcmp.mir	…
test_g_fconstant.mir	…
test_g_gep.mir	…
test_g_icmp.mir	…
test_g_insert.mir	GlobalISel: Verify g_insert	2019-02-19 16:10:16 +00:00
test_g_inttoptr.mir	…
test_g_jump_table.mir	[GlobalISel] Add a G_JUMP_TABLE opcode.	2019-06-11 19:58:06 +00:00
test_g_load.mir	…
test_g_phi.mir	…
test_g_ptrtoint.mir	…
test_g_select.mir	…
test_g_sextload.mir	…
test_g_store.mir	…
test_g_trunc.mir	…
test_g_zextload.mir	…
test_phis_precede_nonphis.mir	…
verifier-generic-extend-truncate.mir	…
verifier-generic-types-1.mir	…
verifier-generic-types-2.mir	…
verifier-implicit-virtreg-invalid-physreg-liveness.mir	[AMDGPU] Add support for immediate operand for S_ENDPGM	2019-03-12 09:52:58 +00:00
verifier-phi-fail0.mir	[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.	2019-04-05 19:28:09 +00:00
verifier-phi.mir	[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.	2019-04-05 19:28:09 +00:00
verifier-pseudo-terminators.mir	…
verify-regbankselected.mir	…
verify-selected.mir	…