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Sanjay Patel c8d88ad1a9 [CodeGenPrepare][x86] shift both sides of a vector select when profitable 
This is based on the example/discussion in PR37428:
https://bugs.llvm.org/show_bug.cgi?id=37428

Proper vector shift instructions don't appear until AVX2, so we may generate several
extra instructions within a loop trying to compensate for that. It's difficult to
recover from that shift expansion later than this, so use the existing TLI hook and
splat analysis to enable better codegen.

This extends CGP functionality introduced with:
rL201655

Differential Revision: https://reviews.llvm.org/D63233

llvm-svn: 363511
 		2019-06-16 15:29:03 +00:00
..
GC
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GlobalISel [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
avx512-shuffles [X86] CombineShuffleWithExtract - handle cases with different vector extract sources 2019-06-16 08:00:41 +00:00
3addr-16bit.ll
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3addr-or.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
3dnow-intrinsics.ll
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4char-promote.ll
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8bit_cmov_of_trunc_promotion.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format 2019-05-15 02:35:32 +00:00
2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly" 2019-02-04 04:15:02 +00:00
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2007-10-31-extractelement-i64.ll
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2007-11-07-MulBy4.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-04-02-unnamedEH.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll [X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx. 2019-04-24 19:28:38 +00:00
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-12-02-dagcombine-3.ll
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2008-12-19-EarlyClobberBug.ll
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2009-01-13-DoubleUpdate.ll
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2009-02-26-MachineLICMBug.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
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2011-10-19-LegelizeLoad.ll
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2011-10-19-widen_vselect.ll [X86] Fix some tests using fcmp with undef arguments 2019-03-29 17:20:27 +00:00
2011-10-21-widen-cmp.ll [X86] Fix some tests using fcmp with undef arguments 2019-03-29 17:20:27 +00:00
2011-10-27-tstore.ll
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2011-10-30-padd.ll
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2011-11-07-LegalizeBuildVector.ll
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2011-11-22-AVX2-Domains.ll
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2011-11-30-or.ll
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2011-12-06-AVXVectorExtractCombine.ll
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-08-AVXISelBugs.ll
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2011-12-8-bitcastintprom.ll
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2011-12-15-vec_shift.ll
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2011-12-26-extractelement-duplicate-load.ll
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2011-12-28-vselecti8.ll Recommit r354647 and r354648 "[LegalizeTypes] When promoting the result of EXTRACT_SUBVECTOR, also check if the input needs to be promoted. Use that to determine the element type to extract" 2019-02-23 19:51:32 +00:00
2011-20-21-zext-ui2fp.ll
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2012-01-10-UndefExceptionEdge.ll
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2012-1-10-buildvector.ll
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2012-01-11-split-cv.ll
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2012-01-12-extract-sv.ll
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2012-01-16-mfence-nosse-flags.ll
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2012-01-18-vbitcast.ll
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2012-02-12-dagco.ll
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2012-02-14-scalar.ll
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
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2012-03-15-build_vector_wl.ll
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2012-03-20-LargeConstantExpr.ll
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2012-03-26-PostRALICMBug.ll
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2012-04-09-TwoAddrPassBug.ll
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2012-04-26-sdglue.ll
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2012-05-17-TwoAddressBug.ll
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2012-05-19-CoalescerCrash.ll
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2012-07-10-extload64.ll [DAGCombiner] loosen restrictions for moving shuffles after vector binop 2019-04-03 13:42:06 +00:00
2012-07-10-shufnorm.ll
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2012-07-15-BuildVectorPromote.ll
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2012-07-15-broadcastfold.ll
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2012-07-15-tconst_shl.ll
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2012-07-15-vshl.ll
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2012-07-16-LeaUndef.ll
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2012-07-16-fp2ui-i1.ll
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2012-07-17-vtrunc.ll
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2012-07-23-select_cc.ll
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2012-08-07-CmpISelBug.ll [X86] Regenerate CmpISel test for future patch 2019-06-11 15:13:11 +00:00
2012-08-16-setcc.ll
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2012-08-17-legalizer-crash.ll
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2012-08-28-UnsafeMathCrash.ll
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2012-09-13-dagco-fneg.ll
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2012-09-28-CGPBug.ll
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2012-10-02-DAGCycle.ll
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2012-10-03-DAGCycle.ll
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2012-10-18-crash-dagco.ll
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2012-11-28-merge-store-alias.ll
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2012-12-1-merge-multiple.ll
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2012-12-12-DAGCombineCrash.ll
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2012-12-14-v8fp80-crash.ll
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2012-12-19-NoImplicitFloat.ll
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2013-01-09-DAGCombineBug.ll
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2013-03-13-VEX-DestReg.ll
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2013-05-06-ConactVectorCrash.ll
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2013-10-14-FastISel-incorrect-vreg.ll
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2014-05-29-factorial.ll
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2014-08-29-CompactUnwind.ll
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9601.ll
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20090313-signext.ll
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AppendingLinkage.ll
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Atomics-64.ll
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DbgValueOtherTargets.test
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DynamicCalleeSavedRegisters.ll
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MachineBranchProb.ll
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MachineSink-CritEdge.ll
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MachineSink-DbgValue.ll
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MachineSink-PHIUse.ll
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MachineSink-SubReg.ll
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MachineSink-eflags.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
MergeConsecutiveStores.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
O0-pipeline.ll Delete x86_64 ShadowCallStack support 2019-03-07 18:56:36 +00:00
O3-pipeline.ll Delete x86_64 ShadowCallStack support 2019-03-07 18:56:36 +00:00
PR34565.ll
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PR37310.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
PR40322.ll [X86] Run CFIInstrInserter on Windows if Dwarf is used 2019-04-29 20:25:51 +00:00
StackColoring-dbg.ll
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StackColoring.ll
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SwitchLowering.ll
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SwizzleShuff.ll
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TruncAssertSext.ll
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TruncAssertZext.ll
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WidenArith.ll
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abi-isel.ll [X86] Fix linux32 pic tests to use correct relocation model (PR39684) 2019-01-29 10:41:48 +00:00
absolute-bit-mask-fastisel.ll
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absolute-bit-mask.ll
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absolute-bt.ll
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absolute-cmp.ll
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absolute-constant.ll
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absolute-rotate.ll [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri patterns to be consistent with the ROR patterns. 2019-03-18 20:43:15 +00:00
add-ext.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
add-i64.ll
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add-of-carry.ll
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add-sub-nsw-nuw.ll
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add.ll [DAGCombiner] fold (add (add (xor a, -1), b), 1) -> (sub b, a) 2019-03-08 19:39:32 +00:00
add32ri8.ll
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add_shl_constant.ll
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addcarry.ll Add test case for add to sub post legalization. NFC 2019-03-11 01:25:48 +00:00
addcarry2.ll
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addr-label-difference.ll
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addr-mode-matcher-2.ll
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addr-mode-matcher.ll
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addr-of-ret-addr.ll
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address-type-promotion-constantexpr.ll
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addrsig.ll
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addsub-constant-folding.ll [NFC][Codegen] Add/sub constant-folding: add scalar tests too 2019-05-31 08:23:48 +00:00
adx-commute.mir
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adx-intrinsics-upgrade.ll
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adx-intrinsics.ll
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aes_intrinsics.ll
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alias-gep.ll
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alias-static-alloca.ll
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aliases.ll
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aligned-comm.ll
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aligned-variadic.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
alignment-2.ll
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alignment.ll
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all-ones-vector.ll
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alldiv-divdi3.ll
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alloca-align-rounding-32.ll
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alloca-align-rounding.ll
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allrem-moddi3.ll
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and-encoding.ll
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and-load-fold.ll
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and-or-fold.ll
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and-sink.ll
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and-su.ll [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
andimm8.ll
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anyext.ll
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anyregcc-crash.ll RegAlloc: try to fail more gracefully when out of registers 2019-05-15 17:29:58 +00:00
anyregcc.ll
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apm.ll [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead. 2019-04-03 23:28:30 +00:00
arg-cast.ll
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arg-copy-elide-win64.ll [X86] Disable argument copy elision for arguments passed via pointers 2019-04-20 15:26:44 +00:00
arg-copy-elide.ll
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arg_returned_bitcast.ll [SelectionDAG][FIX] Allow "returned" arguments to be bit-casted 2019-06-04 20:34:43 +00:00
asm-block-labels.ll
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asm-global-imm.ll
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asm-indirect-mem.ll
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asm-invalid-register-class-crasher.ll
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asm-label.ll
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asm-label2.ll
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asm-mismatched-types.ll
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asm-modifier-P.ll
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asm-modifier.ll
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asm-reg-type-mismatch-avx512.ll [X86] Add test case that was supposed to go with r360102. 2019-05-24 04:46:56 +00:00
asm-reg-type-mismatch.ll
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asm-reject-reg-type-mismatch.ll
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asm-reject-rex.ll
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asm-reject-vk32-vk64.ll [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmConstraint without avx512bw. 2019-04-15 18:39:45 +00:00
asm-reject-xmm16.ll
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atom-call-reg-indirect-foldedreload32.ll
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atom-call-reg-indirect-foldedreload64.ll
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atom-call-reg-indirect.ll
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atom-cmpb.ll
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atom-fixup-lea1.ll
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atom-fixup-lea2.ll
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atom-fixup-lea3.ll
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atom-fixup-lea4.ll
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atom-lea-addw-bug.ll
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atom-lea-sp.ll
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atom-pad-short-functions.ll
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atom-sched.ll
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atom-shuf.ll
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atomic-add.ll [Tests] Auto update a test 2019-02-13 17:30:03 +00:00
atomic-dagsched.ll
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atomic-eflags-reuse.ll
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atomic-flags.ll
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atomic-fp.ll [X86] Use MOVQ for i64 atomic_stores when SSE2 is enabled 2019-04-27 03:38:15 +00:00
atomic-idempotent.ll Use an offset from TOS for idempotent rmw locked op lowering 2019-05-14 22:32:42 +00:00
atomic-load-store-wide.ll [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets 2019-05-14 04:43:37 +00:00
atomic-load-store.ll
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atomic-mi.ll Recommit r358211 "[X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2" 2019-04-11 19:19:42 +00:00
atomic-minmax-i6432.ll
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atomic-monotonic.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
atomic-non-integer.ll [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets 2019-05-14 04:43:37 +00:00
atomic-op.ll [Tests] Rename some test files for consistency 2019-02-13 17:23:11 +00:00
atomic-ops-ancient-64.ll
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atomic-or.ll
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atomic-pointer.ll IR: Support parsing numeric block ids, and emit them in textual output. 2019-03-22 18:27:13 +00:00
atomic-unordered.ll [FastISel] Skip creating unnecessary vregs for arguments 2019-06-10 16:53:37 +00:00
atomic8.ll
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atomic16.ll
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atomic32.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
atomic64.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
atomic128.ll [X86] Check for 64-bit mode in X86Subtarget::hasCmpxchg16b() 2019-03-13 18:48:50 +00:00
atomic6432.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
atomicf128.ll [X86] Check for 64-bit mode in X86Subtarget::hasCmpxchg16b() 2019-03-13 18:48:50 +00:00
attribute-sections.ll
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avg-mask.ll
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avg.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avoid-lea-scale2.ll
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avoid-loop-align-2.ll
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avoid-loop-align.ll
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avoid-sfb-g-no-change.mir Resubmit r360436 "[X86] Avoid SFB - Fix inconsistent codegen with/without debug info" 2019-05-23 18:15:12 +00:00
avoid-sfb-kill-flags.mir
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avoid-sfb-offset.mir
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avoid-sfb-overlaps.ll
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avoid-sfb.ll
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avoid_complex_am.ll
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avx-arith.ll
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avx-basic.ll
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avx-bitcast.ll
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avx-brcond.ll
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avx-cast.ll
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avx-cmp.ll [X86] Fix some tests using fcmp with undef arguments 2019-03-29 17:20:27 +00:00
avx-cvt-2.ll
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avx-cvt-3.ll Recommit r354363 "[X86][SSE] Generalize X86ISD::BLENDI support to more value types" 2019-02-23 21:41:42 +00:00
avx-cvt.ll
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avx-cvttp2si.ll
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avx-fp2int.ll
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avx-gfni-intrinsics.ll
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avx-insertelt.ll
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avx-intel-ocl.ll
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avx-intrinsics-fast-isel.ll
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avx-intrinsics-x86-upgrade.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx-intrinsics-x86.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx-intrinsics-x86_64.ll
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avx-isa-check.ll
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avx-load-store.ll [x86] fix 256-bit vector store splitting to honor 'volatile' 2019-05-28 12:58:07 +00:00
avx-logic.ll
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avx-minmax.ll
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avx-select.ll
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avx-shift.ll
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avx-shuffle-x86_32.ll
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avx-splat.ll
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avx-trunc.ll
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avx-unpack.ll
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avx-varargs-x86_64.ll
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avx-vbroadcast.ll [X86][AVX] Add test case showing failure to fold broadcast load if its also used as a scalar 2019-04-02 10:31:00 +00:00
avx-vbroadcastf128.ll
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avx-vextractf128.ll
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avx-vinsertf128.ll
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avx-vpclmulqdq.ll
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avx-vperm2x128.ll
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avx-vzeroupper.ll
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avx-win64-args.ll
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avx-win64.ll
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avx.ll
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avx1-logical-load-folding.ll [x86] scalarize extract element 0 of FP math 2019-02-28 19:47:04 +00:00
avx2-arith.ll
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avx2-cmp.ll
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avx2-conversions.ll [x86] split more v8f32/v8i32 shuffles in lowering 2019-02-18 16:46:12 +00:00
avx2-fma-fneg-combine.ll
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avx2-gather.ll
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avx2-intrinsics-canonical.ll
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avx2-intrinsics-fast-isel.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
avx2-intrinsics-x86-upgrade.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
avx2-intrinsics-x86.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
avx2-logic.ll
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avx2-masked-gather.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
avx2-nontemporal.ll
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avx2-phaddsub.ll [X86][SSE] Fold add(shuffle(),shuffle()) to hadd on 'slow' targets (PR39920) 2019-05-09 17:45:01 +00:00
avx2-pmovxrm.ll
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avx2-shift.ll
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avx2-vbroadcast.ll [X86][AVX] Only combine loads to broadcasts for legal types 2019-02-27 11:17:25 +00:00
avx2-vbroadcasti128.ll
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avx2-vector-shifts.ll [x86] split more v8f32/v8i32 shuffles in lowering 2019-02-18 16:46:12 +00:00
avx2-vperm.ll
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avx512-adc-sbb.ll
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avx512-any_extend_load.ll
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avx512-arith.ll
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avx512-bugfix-23634.ll
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avx512-bugfix-25270.ll
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avx512-bugfix-26264.ll
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avx512-build-vector.ll
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avx512-calling-conv.ll
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avx512-cmp-kor-sequence.ll
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avx512-cmp.ll
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avx512-cvt-widen.ll [SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205) 2019-06-03 13:02:07 +00:00
avx512-cvt.ll [X86] Fix the pattern for merge masked vcvtps2pd. 2019-06-03 19:29:14 +00:00
avx512-cvttp2i.ll
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avx512-ext.ll
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avx512-extract-subvector-load-store.ll
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avx512-extract-subvector.ll
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avx512-fma-commute.ll
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avx512-fma-intrinsics-upgrade.ll [X86] Make lowering of intrinsics with rounding mode stricter so that only valid rounding modes are lowered. Update tests accordingly 2019-03-10 17:20:45 +00:00
avx512-fma-intrinsics.ll [X86] Add the rounding control operand to the printing for some scalar FMA instructions. 2019-04-21 07:12:56 +00:00
avx512-fma.ll
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avx512-fsel.ll
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avx512-gather-scatter-intrin-deprecated.ll
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avx512-gather-scatter-intrin.ll
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avx512-gfni-intrinsics.ll
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avx512-hadd-hsub.ll [X86][AVX] Fold extract_subvector(broadcast(x)) -> broadcast(x) iff x has one use 2019-04-26 18:02:14 +00:00
avx512-i1test.ll
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avx512-inc-dec.ll
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avx512-insert-extract.ll [X86] Custom lower CONCAT_VECTORS of v2i1 2019-05-28 12:52:57 +00:00
avx512-insert-extract_i1.ll
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avx512-intel-ocl.ll
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avx512-intrinsics-canonical.ll
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avx512-intrinsics-fast-isel.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsics-fast-isel.ll" 2019-06-13 19:24:24 +00:00
avx512-intrinsics-upgrade.ll [DAGCombiner] Replace masked loads with a zero mask with the passthru value 2019-06-02 18:58:46 +00:00
avx512-intrinsics-x86_64.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
avx512-intrinsics.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
avx512-load-store.ll
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avx512-load-trunc-store-i1.ll
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avx512-logic.ll
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avx512-mask-op.ll [TargetLowering] SimplifyDemandedBits - add ISD::INSERT_SUBVECTOR support 2019-04-09 16:52:21 +00:00
avx512-mask-spills.ll
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avx512-mask-zext-bugfix.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
avx512-masked-memop-64-32.ll
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avx512-masked_memop-16-8.ll [X86] Improve the type checking in isLegalMaskedLoad and isLegalMaskedGather. 2019-03-08 07:33:43 +00:00
avx512-memfold.ll
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avx512-mov.ll
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avx512-nontemporal.ll
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avx512-pmovxrm.ll
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avx512-regcall-Mask.ll
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avx512-regcall-NoMask.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
avx512-rndscale.ll
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avx512-rotate.ll
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avx512-scalar.ll
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avx512-scalarIntrinsics.ll
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avx512-scalar_mask.ll
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avx512-select.ll
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avx512-shift.ll
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avx512-skx-insert-subvec.ll
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avx512-trunc-widen.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx512-trunc.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
avx512-unsafe-fp-math.ll
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avx512-vbroadcast.ll [X86] Fix some tests using fcmp with undef arguments 2019-03-29 17:20:27 +00:00
avx512-vbroadcasti128.ll
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avx512-vbroadcasti256.ll
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avx512-vec-cmp.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
avx512-vec3-crash.ll
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avx512-vpclmulqdq.ll
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avx512-vpermv3-commute.ll
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avx512-vpternlog-commute.ll
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avx512-vselect-crash.ll
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avx512-vselect.ll
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avx512bf16-intrinsics.ll [CodeGen] Move X86 tests under the X86 directory 2019-05-06 10:21:17 +00:00
avx512bf16-vl-intrinsics.ll [CodeGen] Move X86 tests under the X86 directory 2019-05-06 10:21:17 +00:00
avx512bw-arith.ll
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avx512bw-intrinsics-canonical.ll
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avx512bw-intrinsics-fast-isel.ll
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avx512bw-intrinsics-upgrade.ll
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avx512bw-intrinsics.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
avx512bw-mask-op.ll
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avx512bw-mov.ll
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avx512bw-vec-cmp.ll
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avx512bw-vec-test-testn.ll
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avx512bwvl-arith.ll
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avx512bwvl-intrinsics-canonical.ll
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avx512bwvl-intrinsics-fast-isel.ll
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avx512bwvl-intrinsics-upgrade.ll
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avx512bwvl-intrinsics.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
avx512bwvl-mov.ll
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avx512bwvl-vec-cmp.ll
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avx512bwvl-vec-test-testn.ll
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avx512cd-intrinsics-fast-isel.ll
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avx512cd-intrinsics-upgrade.ll
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avx512cd-intrinsics.ll
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avx512cdvl-intrinsics-upgrade.ll
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avx512cdvl-intrinsics.ll
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avx512dq-intrinsics-fast-isel.ll
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avx512dq-intrinsics-upgrade.ll [X86] Make lowering of intrinsics with rounding mode stricter so that only valid rounding modes are lowered. Update tests accordingly 2019-03-10 17:20:45 +00:00
avx512dq-intrinsics.ll [X86] Make lowering of intrinsics with rounding mode stricter so that only valid rounding modes are lowered. Update tests accordingly 2019-03-10 17:20:45 +00:00
avx512dq-mask-op.ll
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avx512dqvl-intrinsics-fast-isel.ll
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avx512dqvl-intrinsics-upgrade.ll [X86][AVX] concat_vectors(scalar_to_vector(x),scalar_to_vector(x)) --> broadcast(x) 2019-02-23 18:34:05 +00:00
avx512dqvl-intrinsics.ll
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avx512er-intrinsics.ll
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avx512f-256-set0.mir [X86] Fix machineverifier error on avx512f-256-set0.mir 2019-05-29 17:02:27 +00:00
avx512f-vec-test-testn.ll
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avx512ifma-intrinsics-fast-isel.ll
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avx512ifma-intrinsics-upgrade.ll [X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support 2019-02-19 15:57:09 +00:00
avx512ifma-intrinsics.ll [X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support 2019-02-19 15:57:09 +00:00
avx512ifmavl-intrinsics-fast-isel.ll
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avx512ifmavl-intrinsics-upgrade.ll
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avx512ifmavl-intrinsics.ll
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avx512vbmi-intrinsics-fast-isel.ll
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avx512vbmi-intrinsics-upgrade.ll
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avx512vbmi-intrinsics.ll
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avx512vbmi2-intrinsics-fast-isel.ll
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avx512vbmi2-intrinsics-upgrade.ll [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument. 2019-01-28 07:03:03 +00:00
avx512vbmi2-intrinsics.ll [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument. 2019-01-28 07:03:03 +00:00
avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument. 2019-01-28 07:03:03 +00:00
avx512vbmi2vl-intrinsics.ll [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument. 2019-01-28 07:03:03 +00:00
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
…
avx512vbmivl-intrinsics.ll
…
avx512vl-arith.ll
…
avx512vl-intrinsics-canonical.ll
…
avx512vl-intrinsics-fast-isel.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll" 2019-06-13 19:24:34 +00:00
avx512vl-intrinsics-upgrade.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
avx512vl-intrinsics.ll [X86] Add new variadic avx512 compress/expand intrinsics that use vXi1 types for the mask argument. 2019-01-28 07:03:03 +00:00
avx512vl-logic.ll
…
avx512vl-mov.ll
…
avx512vl-nontemporal.ll
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avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
…
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vl_vnni-intrinsics-upgrade.ll
…
avx512vl_vnni-intrinsics.ll
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avx512vlcd-intrinsics-fast-isel.ll
…
avx512vlvp2intersect-intrinsics.ll [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
avx512vnni-intrinsics-upgrade.ll
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avx512vnni-intrinsics.ll
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avx512vp2intersect-intrinsics.ll [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
avx512vpopcntdq-intrinsics.ll
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backpropmask.ll
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bad-tls-fold.mir
…
barrier-sse.ll
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barrier.ll
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base-pointer-and-cmpxchg.ll
…
basic-promote-integers.ll
…
bb_rotate.ll [MBP] Factor out function hasViableTopFallthrough and enhancement 2019-02-22 18:04:37 +00:00
bc-extract.ll
…
bigstructret.ll
…
bigstructret2.ll
…
bit-piece-comment.ll
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bit-test-shift.ll
…
bitcast-and-setcc-128.ll
…
bitcast-and-setcc-256.ll [X86][AVX] combineBitcastvxi1 - peek through bitops to determine size of original vector 2019-05-26 10:54:23 +00:00
bitcast-and-setcc-512.ll [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support 2019-04-07 10:40:01 +00:00
bitcast-i256.ll
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bitcast-int-to-vector-bool-sext.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
bitcast-int-to-vector-bool-zext.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
bitcast-int-to-vector-bool.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
bitcast-int-to-vector.ll
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bitcast-mmx.ll
…
bitcast-setcc-128.ll [X86][SSE] SimplifyDemandedBitsForTargetNode - Add initial PACKSS support 2019-04-07 10:40:01 +00:00
bitcast-setcc-256.ll Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling" 2019-05-13 04:03:35 +00:00
bitcast-setcc-512.ll Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling" 2019-05-13 04:03:35 +00:00
bitcast-vector-bool.ll Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling" 2019-05-13 04:03:35 +00:00
bitcast.ll
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bitcast2.ll
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bitcnt-false-dep.ll
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bitreverse.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
block-placement.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
block-placement.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
bmi-intrinsics-fast-isel-x86_64.ll
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bmi-intrinsics-fast-isel.ll
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bmi-x86_64.ll
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bmi.ll [DAGCombiner][X86] Fold (not (neg X)) -> (add X, -1) 2019-06-04 17:44:18 +00:00
bmi2-x86_64.ll
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bmi2.ll
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bool-ext-inc.ll [DAGCombiner] sub X, 0/1 --> add X, 0/-1 2019-01-30 22:41:35 +00:00
bool-math.ll [X86] Enable 8-bit OR with disjoint bits to convert to LEA 2019-03-05 18:37:33 +00:00
bool-simplify.ll
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bool-vector.ll [X86][SSE] Extract i1 elements from vXi1 bool vectors 2019-05-01 10:02:22 +00:00
bool-zext.ll
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br-fold.ll
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branchfolding-catchpads.ll
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branchfolding-debugloc.ll
…
branchfolding-landingpads.ll
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branchfolding-undef.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
brcond.ll
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break-anti-dependencies.ll
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break-false-dep.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
broadcast-elm-cross-splat-vec.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
broadcastm-lowering.ll
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bss_pagealigned.ll
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bswap-inline-asm.ll
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bswap-rotate.ll
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bswap-vector.ll
…
bswap-wide-int.ll
…
bswap.ll
…
bswap_tree.ll
…
bswap_tree2.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
bt.ll [x86] make 8-bit shl undesirable 2019-04-08 13:58:50 +00:00
btc_bts_btr.ll [TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes. 2019-04-12 06:49:28 +00:00
btq.ll
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bug26810.ll
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bug37521.ll
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build-vector-128.ll
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build-vector-256.ll
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build-vector-512.ll
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buildvec-extract.ll [X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a shuffle 2019-02-01 16:02:12 +00:00
buildvec-insertvec.ll
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bypass-slow-division-32.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
bypass-slow-division-64.ll
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bypass-slow-division-tune.ll
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byval-align.ll
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byval-callee-cleanup.ll
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byval.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval2.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval3.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval4.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval5.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval6.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
byval7.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
cache-intrinsic.ll
…
call-imm.ll
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call-push.ll
…
callbr-asm-bb-exports.ll [X86] Add test case for r361177. 2019-05-20 17:37:52 +00:00
callbr-asm-blockplacement.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
callbr-asm-branch-folding.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
callbr-asm-destinations.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
callbr-asm-errors.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
callbr-asm-outputs.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
callbr-asm.ll Implementation of asm-goto support in LLVM 2019-02-08 20:48:56 +00:00
cas.ll
…
cast-vsel.ll [x86] split 256-bit vector selects if operands are vector concats 2019-06-16 14:04:49 +00:00
catch.ll
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catchpad-dynamic-alloca.ll
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catchpad-lifetime.ll
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catchpad-realign-savexmm.ll
…
catchpad-regmask.ll
…
catchpad-reuse.ll
…
catchpad-weight.ll
…
catchret-empty-fallthrough.ll
…
catchret-fallthrough.ll
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catchret-regmask.ll
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cfi-inserter-cfg-with-merge.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
cfi-inserter-check-order.ll
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cfi-inserter-noreturnblock.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
cfi-inserter-verify-inconsistent-offset.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
cfi-inserter-verify-inconsistent-register.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
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cgp-usubo.ll [CodeGenPrepare] limit overflow intrinsic matching to a single basic block (2nd try) 2019-05-04 12:46:32 +00:00
chain_order.ll
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change-compare-stride-1.ll
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change-compare-stride-trickiness-0.ll
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change-compare-stride-trickiness-1.ll
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change-compare-stride-trickiness-2.ll
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change-unsafe-fp-math.ll
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cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
…
cleanuppad-realign.ll
…
clear-highbits.ll
…
clear-lowbits.ll
…
clear_upper_vector_element_bits.ll
…
clflushopt.ll
…
clwb.ll
…
clz.ll [x86] regenerate checks; NFC 2019-02-21 15:30:28 +00:00
clzero.ll [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead. 2019-04-03 23:28:30 +00:00
cmov-double.ll [x86] auto-generate complete checks for test; NFC 2019-03-22 15:33:47 +00:00
cmov-fp.ll
…
cmov-into-branch.ll
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cmov-promotion.ll [X86] X86ISelLowering::combineSextInRegCmov(): also handle i8 CMOV's 2019-03-15 21:18:05 +00:00
cmov.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
cmovcmov.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
cmp-fast-isel.ll
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cmp.ll [X86] When promoting i16 compare with immediate to i32, try to use sign_extend for eq/ne if the input is truncated from a type with enough sign its. 2019-06-10 04:50:12 +00:00
cmpxchg-clobber-flags.ll
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cmpxchg-i1.ll
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cmpxchg-i128-i1.ll
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cmpxchg8b.ll [X86] Add CMPXCHG8B feature flag. Set it for all CPUs except i386/i486 including 'generic'. Disable use of CMPXCHG8B when this flag isn't set. 2019-03-20 23:35:49 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
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cmpxchg16b.ll
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coal-sections.ll
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coalesce-dbg-value-subreg-rewrite.mir
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coalesce-dead-lanes.mir
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coalesce-esp.ll
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coalesce-implicitdef.ll
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coalesce_commute_movsd.ll
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coalesce_commute_subreg.ll
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coalescer-commute1.ll
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coalescer-commute2.ll
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coalescer-commute3.ll
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coalescer-commute4.ll
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coalescer-commute5.ll
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coalescer-cross.ll
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coalescer-dce.ll
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coalescer-dce2.ll
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coalescer-identity.ll
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coalescer-remat.ll
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coalescer-subreg.ll
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coalescer-win64.ll
…
code-model-elf-memset.ll
…
code-model-elf.ll [X86] Fix tls variable lowering issue with large code model 2019-02-24 19:33:37 +00:00
code-model-kernel.ll
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code_placement.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
code_placement_align_all.ll
…
code_placement_cold_loop_blocks.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
code_placement_eh.ll
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code_placement_ignore_succ_in_inner_loop.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
code_placement_loop_rotation.ll
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code_placement_loop_rotation2.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
code_placement_loop_rotation3.ll
…
code_placement_no_header_change.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
codegen-prepare-addrmode-sext.ll
…
codegen-prepare-cast.ll
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codegen-prepare-crash.ll
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codegen-prepare-extload.ll
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codegen-prepare-replacephi.mir test/CodeGen/X86/codegen-prepare-replacephi.mir requires a default triple 2019-03-27 20:43:47 +00:00
codegen-prepare-uaddo.ll [CGP] add special-cases to form unsigned add with overflow (PR40486) 2019-02-24 15:31:27 +00:00
codegen-prepare.ll
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codemodel.ll [X86] Use PC-relative mode for the kernel code model 2019-04-13 21:39:28 +00:00
coff-comdat.ll
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coff-comdat2.ll
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coff-comdat3.ll
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coff-feat00.ll
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coff-no-dead-strip.ll
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coff-weak.ll
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coldcc64.ll
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combine-64bit-vec-binop.ll
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combine-abs.ll
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combine-adc.ll [X86] Merge ISD::ADD/SUB nodes into X86ISD::ADD/SUB equivalents (PR40483) 2019-02-25 11:19:37 +00:00
combine-add-ssat.ll
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combine-add-usat.ll [X86] Lower ISD::UADDO to use the Z flag instead of C flag when the RHS is a constant 1 to encourage INC formation. 2019-02-03 07:25:06 +00:00
combine-add.ll [DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold. Try 3 2019-05-30 20:36:54 +00:00
combine-addo.ll [DAGCombiner] Enable UADDO/USUBO vector combine support 2019-03-06 16:11:03 +00:00
combine-adx.ll
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combine-and.ll
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combine-avx-intrinsics.ll
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combine-avx2-intrinsics.ll
…
combine-bitreverse.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
combine-bitselect.ll [X86][AVX] getTargetConstantBitsFromNode - extract bits from X86ISD::SUBV_BROADCAST 2019-04-10 16:24:47 +00:00
combine-bswap.ll [X86] Add basic bitreverse/bswap combine tests 2019-02-10 18:07:03 +00:00
combine-concatvectors.ll
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combine-fabs.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll" 2019-06-13 19:24:34 +00:00
combine-fcopysign.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
combine-lds.ll
…
combine-mul.ll
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combine-mulo.ll [DAGCombiner] Enable SMULO/UMULO vector combine support (PR40442) 2019-03-06 11:04:21 +00:00
combine-multiplies.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
combine-or.ll
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combine-pmuldq.ll Revert rL356864 : [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG (PR40685) 2019-03-27 10:25:02 +00:00
combine-rotates.ll
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combine-sbb.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
combine-sdiv.ll [SelectionDAG] ComputeNumSignBits - support constant pool values from target 2019-06-04 10:49:06 +00:00
combine-select.ll
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combine-sext-in-reg.ll
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combine-shl.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
combine-smax.ll
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combine-smin.ll
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combine-sra.ll [x86] split more v8f32/v8i32 shuffles in lowering 2019-02-18 16:46:12 +00:00
combine-srem.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
combine-srl.ll [x86] split more v8f32/v8i32 shuffles in lowering 2019-02-18 16:46:12 +00:00
combine-sse41-intrinsics.ll [X86][SSE] Add SimplifyDemandedBits test for BLENDVPD 2019-02-10 12:55:44 +00:00
combine-sub-ssat.ll
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combine-sub-usat.ll
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combine-sub.ll
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combine-subo.ll [DAGCombiner] Enable UADDO/USUBO vector combine support 2019-03-06 16:11:03 +00:00
combine-testm-and.ll
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combine-udiv.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
combine-umax.ll
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combine-umin.ll
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combine-urem.ll
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commandline-metadata.ll
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commute-3dnow.ll
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commute-blend-avx2.ll
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commute-blend-sse41.ll [X86][SSE] Use pblendw for v4i32/v2i64 during isel. 2019-02-24 19:23:41 +00:00
commute-clmul.ll
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commute-fcmp.ll
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commute-intrinsic.ll
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commute-two-addr.ll
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commute-vpclmulqdq-avx.ll
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commute-vpclmulqdq-avx512.ll
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commute-xop.ll
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commuted-blend-mask.ll
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compact-unwind.ll
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compare-add.ll
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compare-global.ll
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compare-inf.ll
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compare_folding.ll
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compiler_used.ll
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complex-asm.ll
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complex-fastmath.ll
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complex-fca.ll
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computeKnownBits_urem.ll
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condbr_if.ll
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condbr_switch.ll
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conditional-indecrement.ll
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conditional-tailcall-samedest.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
conditional-tailcall.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
consecutive-load-shuffle.ll
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const-base-addr.ll
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const-shift-of-constmasked.ll [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern tests 2019-05-14 20:17:04 +00:00
constant-combines.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
constant-hoisting-and.ll
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constant-hoisting-bfi.ll
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constant-hoisting-cmp.ll
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constant-hoisting-optnone.ll
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constant-hoisting-shift-immediate.ll
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constant-pool-remat-0.ll
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constant-pool-sharing.ll
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constpool.ll
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constrained-fp80-trunc-ext.ll [FPEnv] Lower STRICT_FP_EXTEND and STRICT_FP_ROUND nodes in preprocess phase of ISelLowering to mirror non-strict nodes on x86. 2019-06-14 16:28:55 +00:00
constructor.ll
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convert-2-addr-3-addr-inc64.ll
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copy-eflags.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
copy-propagation.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
copysign-constant-magnitude.ll
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cpus-amd-no-x86_64.ll
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cpus-amd.ll [X86] AMD znver2 enablement 2019-02-26 16:55:10 +00:00
cpus-intel-no-x86_64.ll
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cpus-intel.ll [X86] -march=cooperlake (llvm) 2019-06-07 08:31:35 +00:00
cpus-no-x86_64.ll
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cpus-other.ll
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crash-O0.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
crash-lre-eliminate-dead-def.ll
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crash-nosse.ll
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crash.ll
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critical-anti-dep-breaker.ll
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critical-edge-split-2.ll
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cse-add-with-overflow.ll
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cstring.ll
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ctor-priority-coff.ll
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ctpop-combine.ll [TargetLowering] Simplify (ctpop x) == 1 2019-06-09 18:18:57 +00:00
cvt16.ll
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cvtv2f32.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
cxx_tlscc64.ll
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dag-fmf-cse.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
dag-merge-fast-accesses.ll
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dag-optnone.ll
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dag-rauw-cse.ll
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dag-update-nodetomatch.ll
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dagcombine-and-setcc.ll
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dagcombine-buildvector.ll
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dagcombine-cse.ll Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling" 2019-05-13 04:03:35 +00:00
dagcombine-select.ll
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dagcombine-shifts.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
dagcombine-tokenfactor-limit-crash.ll Recommit r360171: [DAGCombiner] Avoid creating large tokenfactors in visitTokenFactor. 2019-06-03 01:30:19 +00:00
dagcombine-unsafe-math.ll
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darwin-bzero.ll
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darwin-no-dead-strip.ll
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darwin-preemption.ll
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darwin-quote.ll
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darwin-tls.ll
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dbg-baseptr.ll
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dbg-changes-codegen-branch-folding.ll
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dbg-changes-codegen-branch-folding2.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
dbg-changes-codegen.ll
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dbg-combine.ll
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dbg-line-0-no-discriminator.ll
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dbg-value-superreg-copy.mir
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debug-loclists.ll [DWARF v5] Fix DWARF emitter and consumer to produce/expect a uleb for a location description's length. 2019-02-01 17:11:58 +00:00
debug-nodebug-crash.ll
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debuginfo-locations-dce.ll
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debugloc-argsize.ll
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debugloc-no-line-0.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
deopt-bundles.ll
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deopt-intrinsic-cconv.ll
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deopt-intrinsic.ll
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disable-tail-calls.ll
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discontiguous-loops.ll
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discriminate-mem-ops-missing-info.ll [llvm] X86DiscriminateMemOps: insert debug info when missing 2019-05-10 00:12:51 +00:00
discriminate-mem-ops-skip-pfetch.ll Skip over prefetches 2019-05-10 21:27:55 +00:00
discriminate-mem-ops.ll
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div-rem-simplify.ll
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div8.ll
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divide-by-constant.ll
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divide-windows-itanium.ll
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divrem.ll
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divrem8_ext.ll
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dllexport-x86_64.ll
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dllexport.ll
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dllimport-x86_64.ll
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dllimport.ll
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dollar-name.ll
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domain-reassignment-implicit-def.ll
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domain-reassignment-test.ll
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domain-reassignment.mir [X86] Regenerate checks for domain-reassignment.mir 2019-04-15 05:22:47 +00:00
dont-trunc-store-double-to-float.ll
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dropped_constructor.ll
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dwarf-comp-dir.ll
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dwarf-eh-prepare.ll
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dwarf-headers.ll
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dwarf-split-line-1.ll
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dwarf-split-line-2.ll
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dyn-stackalloc.ll
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dyn_alloca_aligned.ll
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dynamic-alloca-in-entry.ll
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dynamic-alloca-lifetime.ll
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dynamic-allocas-VLAs.ll
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dynamic-regmask.ll
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early-cfi-sections.ll
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early-ifcvt-crash.ll
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early-ifcvt.ll
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eh-frame-unreachable.ll
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eh-label.ll
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eh-nolandingpads.ll
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eh-null-personality.ll
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eh-unknown.ll
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eh_frame.ll
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eip-addressing-i386.ll
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element-wise-atomic-memory-intrinsics.ll [Tests] Yet more combination of tests for unordered.atomic memset 2019-05-07 17:45:52 +00:00
elf-associated.ll
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elf-comdat.ll
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elf-comdat2.ll
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emit-big-cst.ll
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empty-function.ll
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empty-functions.ll
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empty-struct-return-type.ll
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emutls-pic.ll
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emutls-pie.ll
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emutls.ll
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emutls_generic.ll
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enqcmd-intrinsics.ll [X86] Add ENQCMD instructions 2019-05-30 03:59:16 +00:00
epilogue-cfi-fp.ll
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epilogue-cfi-no-fp.ll
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epilogue.ll
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equiv_with_fndef.ll
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equiv_with_vardef.ll
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evex-to-vex-compress.mir [X86] Correct instruction operands in evex-to-vex-compress.mir to be closer to real instructions. 2019-06-13 07:11:02 +00:00
exception-label.ll
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exedeps-movq.ll [x86] scalarize extract element 0 of FP math 2019-02-28 19:47:04 +00:00
exedepsfix-broadcast.ll
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expand-integer-x86_64-intrinsic-error.ll [X86] Add test case for report_fatal_error added in r352699. 2019-02-04 21:24:15 +00:00
expand-opaque-const.ll
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expand-post-ra-pseudo.mir
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expand-vr64-gr64-copy.mir
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extend-set-cc-uses-dbg.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
extend.ll
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extended-fma-contraction.ll
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extern_weak.ll [COFF] Use COFF stubs for extern_weak functions 2019-05-07 23:06:21 +00:00
extmul64.ll
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extmul128.ll
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extract-bits.ll [NFC][X86] extract-{low,}bits.ll: one more pattern c with truncation 2019-06-03 08:44:09 +00:00
extract-combine.ll
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extract-concat.ll
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extract-extract.ll
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extract-fp.ll [X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax 2019-05-25 16:44:29 +00:00
extract-insert.ll [TargetLowering] SimplifyDemandedBits - use DemandedElts in bitcast handling 2019-04-08 20:59:38 +00:00
extract-lowbits.ll [NFC][X86] extract-{low,}bits.ll: one more pattern c with truncation 2019-06-03 08:44:09 +00:00
extract-store.ll
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extractelement-fp.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
extractelement-from-arg.ll
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extractelement-index.ll
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extractelement-legalization-cycle.ll
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extractelement-legalization-store-ordering.ll
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extractelement-load.ll [X86] combineExtractWithShuffle - more aggressively peek through bitcasts 2019-01-31 11:55:30 +00:00
extractelement-shuffle.ll
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extractps.ll
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f16c-intrinsics-fast-isel.ll
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f16c-intrinsics.ll
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fabs.ll
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fadd-combines.ll
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fast-cc-callee-pops.ll
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fast-cc-merge-stack-adj.ll
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fast-cc-pass-in-regs.ll
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fast-isel-abort-warm.ll
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fast-isel-agg-constant.ll
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fast-isel-args-fail.ll
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fast-isel-args-fail2.ll
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fast-isel-args.ll
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fast-isel-atomic.ll
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fast-isel-avoid-unnecessary-pic-base.ll
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fast-isel-bail.ll
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fast-isel-bc.ll
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fast-isel-bitcasts-avx.ll
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fast-isel-bitcasts-avx512.ll
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fast-isel-bitcasts.ll
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fast-isel-branch_weights.ll
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fast-isel-call-bool.ll
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fast-isel-call-cleanup.ll
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fast-isel-call.ll
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fast-isel-cmp-branch.ll
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fast-isel-cmp-branch2.ll
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fast-isel-cmp-branch3.ll
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fast-isel-cmp.ll
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fast-isel-constant.ll
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fast-isel-constpool.ll
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fast-isel-constrain-store-indexreg.ll
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fast-isel-deadcode.ll
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fast-isel-divrem-x86-64.ll
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fast-isel-divrem.ll
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fast-isel-double-half-convertion.ll
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fast-isel-emutls.ll
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fast-isel-expect.ll
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fast-isel-extract.ll
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fast-isel-float-half-convertion.ll
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fast-isel-fneg-kill.ll [FastISel] Pass the fneg input operand to hasTrivialKill in FastISel::selectFNeg. 2019-05-06 23:09:09 +00:00
fast-isel-fneg.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
fast-isel-fold-mem.ll
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fast-isel-fptrunc-fpext.ll
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fast-isel-gc-intrinsics.ll [FastISel] Fix crash for gc.relocate lowring 2019-04-05 05:41:08 +00:00
fast-isel-gep.ll
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fast-isel-gv.ll
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fast-isel-i1.ll
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fast-isel-int-float-conversion-x86-64.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
fast-isel-int-float-conversion.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
fast-isel-load-i1.ll
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fast-isel-mem.ll
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fast-isel-movsbl-indexreg.ll
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fast-isel-nontemporal.ll [X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1. 2019-05-11 04:19:33 +00:00
fast-isel-noplt-pic.ll
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fast-isel-ret-ext.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
fast-isel-select-cmov.ll
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fast-isel-select-cmov2.ll
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fast-isel-select-cmp.ll
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fast-isel-select-pseudo-cmov.ll [X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to fix a machine verifier error after adding test cases. 2019-05-11 16:00:28 +00:00
fast-isel-select-sse.ll
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fast-isel-select.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
fast-isel-sext-zext.ll
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fast-isel-sext.ll
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fast-isel-shift.ll [X86] Enable 8-bit SHL to convert to LEA 2019-03-05 18:37:41 +00:00
fast-isel-sse12-fptoint.ll
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fast-isel-stackcheck.ll
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fast-isel-store.ll
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fast-isel-tailcall.ll
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fast-isel-tls.ll
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fast-isel-trunc-kill-subreg.ll
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fast-isel-uint-float-conversion-x86-64.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
fast-isel-uint-float-conversion.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
fast-isel-vecload.ll
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fast-isel-x32.ll
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fast-isel-x86-64.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
fast-isel-x86.ll
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fast-isel.ll
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fastcall-correct-mangling.ll
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fastcc-2.ll
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fastcc-byval.ll
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fastcc-sret.ll
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fastcc.ll
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fastcc3struct.ll
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fastisel-gep-promote-before-add.ll
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fastisel-softfloat.ll
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fastmath-float-half-conversion.ll
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fcmove.ll [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
fcmp-constant.ll [SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC 2019-04-05 14:56:21 +00:00
fdiv-combine-vec.ll [DAGCombiner] try repeated fdiv divisor transform before building estimate (2nd try) 2019-05-02 15:02:08 +00:00
fdiv-combine.ll adding more fmf propagation for selects plus updated tests 2019-06-15 04:53:51 +00:00
fdiv.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll" 2019-06-13 19:24:38 +00:00
fentry-insertion.ll
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field-extract-use-trunc.ll
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fildll.ll
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file-directive.ll [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
file-source-filename.ll
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finite-libcalls.ll Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly" 2019-02-04 04:15:02 +00:00
fixed-stack-di-mir.ll
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fixup-bw-copy.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
fixup-bw-copy.mir
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fixup-bw-inst.ll
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fixup-bw-inst.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
fixup-lea.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
flags-copy-lowering.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
float-asmprint.ll
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float-conv-elim.ll
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floor-soft-float.ll
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fltused.ll
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fltused_function_pointer.ll
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fltused_math.ll
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fma-commute-x86.ll
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fma-do-not-commute.ll
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fma-fneg-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll" 2019-06-13 19:24:41 +00:00
fma-intrinsics-canonical.ll Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll" 2019-06-13 19:24:47 +00:00
fma-intrinsics-fast-isel.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
fma-intrinsics-phi-213-to-231.ll
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fma-intrinsics-x86-upgrade.ll
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fma-intrinsics-x86.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll" 2019-06-13 19:24:57 +00:00
fma-phi-213-to-231.ll
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fma-scalar-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll" 2019-06-13 19:25:00 +00:00
fma-scalar-memfold.ll
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fma.ll
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fma4-commute-x86.ll
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fma4-fneg-combine.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll" 2019-06-13 19:25:03 +00:00
fma4-intrinsics-x86-upgrade.ll
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fma4-intrinsics-x86.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll" 2019-06-13 19:24:54 +00:00
fma4-intrinsics-x86_64-folded-load.ll
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fma4-scalar-memfold.ll
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fma_patterns.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll" 2019-06-13 19:25:06 +00:00
fma_patterns_wide.ll Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll" 2019-06-13 19:25:09 +00:00
fmaddsub-combine.ll
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fmaxnum.ll [X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax 2019-05-25 16:44:29 +00:00
fmf-flags.ll [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
fmf-propagation.ll Propagate fmf for setcc in SDAG for select folds 2019-06-03 21:53:26 +00:00
fminnum.ll [X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax 2019-05-25 16:44:29 +00:00
fmsubadd-combine.ll
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fmul-combines.ll Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll" 2019-06-13 19:25:12 +00:00
fnabs.ll Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll" 2019-06-13 19:25:12 +00:00
fold-add.ll
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fold-and-shift-x86_64.ll [X86] Teach foldMaskedShiftToScaledMask to look through an any_extend from i32 to i64 between the and & shl 2019-04-10 21:42:08 +00:00
fold-and-shift.ll [X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx. 2019-04-24 19:28:38 +00:00
fold-call-2.ll
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fold-call-3.ll [X86] If PreprocessISelDAG reorders a load before a call, make sure we remove dead nodes from the graph 2019-04-30 17:56:47 +00:00
fold-call-oper.ll
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fold-call.ll
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fold-imm.ll
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fold-load-binops.ll [X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns. 2019-06-11 04:30:53 +00:00
fold-load-unops.ll
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fold-load-vec.ll
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fold-load.ll
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fold-mul-lohi.ll
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fold-pcmpeqd-1.ll
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fold-pcmpeqd-2.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
fold-push.ll
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fold-rmw-ops.ll [X86] Teach isel for RMW binops to handle negate 2019-03-30 18:59:17 +00:00
fold-sext-trunc.ll
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fold-tied-op.ll Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg 2019-04-10 18:00:41 +00:00
fold-vector-bv-crash.ll
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fold-vector-sext-crash.ll
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fold-vector-sext-crash2.ll
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fold-vector-sext-zext.ll
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fold-vector-shl-crash.ll
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fold-vector-shuffle-crash.ll
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fold-vector-trunc-sitofp.ll
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fold-vex.ll
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fold-xmm-zero.ll
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fold-zext-trunc.ll
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fops-windows-itanium.ll
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force-align-stack-alloca.ll
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force-align-stack.ll
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fp-arith.ll
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fp-cvt.ll [X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobbering EFLAGS to prevent mis-scheduling during conversion from SelectionDAG to MIR. 2019-02-19 22:37:00 +00:00
fp-double-rounding.ll
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fp-elim-and-no-fp-elim.ll
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fp-elim.ll
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fp-fast.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-fold.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-immediate-shorten.ll
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fp-in-intregs.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-intrinsics.ll Add constrained fptrunc and fpext intrinsics. 2019-05-13 13:23:30 +00:00
fp-load-trunc.ll
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fp-logic-replace.ll
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fp-logic.ll
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fp-select-cmp-and.ll
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fp-stack-2results.ll [NFC] This is a test for the commit access. 2019-05-06 08:31:18 +00:00
fp-stack-O0-crash.ll
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fp-stack-O0.ll
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fp-stack-compare-cmov.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-stack-compare.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
fp-stack-direct-ret.ll
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fp-stack-ret-conv.ll
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fp-stack-ret-store.ll
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fp-stack-ret.ll
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fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
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fp-stack.ll
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fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fp2sint.ll
…
fp128-calling-conv.ll
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fp128-cast.ll [X86] Use (SUBREG_TO_REG (MOV32rm)) for extloadi64i8/extloadi64i16 when the load is 4 byte aligned or better and not volatile. 2019-04-07 19:19:44 +00:00
fp128-compare.ll
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fp128-extract.ll
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fp128-g.ll
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fp128-i128.ll
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fp128-libcalls.ll
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fp128-load.ll
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fp128-select.ll
…
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
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fpcmp-soft-fp.ll
…
fpstack-debuginstr-kill.ll
…
fptosi-constant.ll
…
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frameaddr.ll
…
frameregister.ll
…
frem-msvc32.ll
…
fsgsbase.ll
…
fshl.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
fshr.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
fsxor-alignment.ll Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll" 2019-06-13 19:25:16 +00:00
ftrunc.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
full-lsr.ll
…
funclet-layout.ll
…
function-alias.ll
…
function-subtarget-features-2.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll [X86] Fix the pattern changes from r356121 so that the ROR*r1/ROR*m1 pattern use the rotr opcode. 2019-03-14 16:53:24 +00:00
funnel-shift.ll [DAGCombine] Simplify funnel shifts with undef/zero args to bitshifts 2019-02-10 17:04:00 +00:00
ga-offset.ll
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ga-offset2.ll
…
gather-addresses.ll
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gcc_except_table.ll
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gcc_except_table_functions.ll
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gep-expanded-vector.ll
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getelementptr.ll
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gfni-intrinsics.ll
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ghc-cc.ll
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ghc-cc64.ll
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global-access-pie-copyrelocs.ll
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global-access-pie.ll
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global-fill.ll
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global-sections-comdat.ll
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global-sections-tls.ll
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global-sections.ll
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gnu-seh-nolpads.ll
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gpr-to-mask.ll
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greedy_regalloc_bad_eviction_sequence.ll
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gs-fold.ll
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h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
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h-registers-2.ll
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h-registers-3.ll
…
haddsub-2.ll
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haddsub-3.ll [x86] make sure horizontal op and broadcast types match to simplify (PR41414) 2019-04-24 14:05:08 +00:00
haddsub-shuf.ll [X86][AVX] Add broadcast(v4f64 hadd) test 2019-06-13 11:42:32 +00:00
haddsub-undef.ll [X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433) 2019-05-13 16:02:45 +00:00
haddsub.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
half.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
handle-move.ll
…
hhvm-cc.ll
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hidden-vis-2.ll
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hidden-vis-3.ll
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hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
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hipe-cc.ll
…
hipe-cc64.ll
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hipe-prologue.ll
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hoist-and-by-const-from-lshr-in-eqcmp-zero.ll [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) ==/!= 0' tests 2019-06-05 14:08:11 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll [NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) ==/!= 0' tests 2019-06-05 14:08:11 +00:00
hoist-common.ll
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hoist-invariant-load.ll Allow unordered loads to be considered invariant in CodeGen 2019-03-19 18:27:18 +00:00
hoist-spill-lpad.ll
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hoist-spill.ll [X86] Remove icmp undef from reduced tests 2019-03-24 17:02:08 +00:00
horizontal-reduce-smax.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
horizontal-reduce-smin.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
horizontal-reduce-umax.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
horizontal-reduce-umin.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
horizontal-shuffle-demanded.ll [X86][SSE] SimplifyDemandedBits - call PEXTRB/PEXTRW SimplifyDemandedVectorElts as well. 2019-05-11 21:35:50 +00:00
horizontal-shuffle.ll
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huge-stack-offset.ll
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huge-stack-offset2.ll
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i1narrowfail.ll
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i2k.ll
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i16lshr8pat.ll
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i64-mem-copy.ll [X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support 2019-02-19 15:57:09 +00:00
i64-to-float.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
i128-and-beyond.ll
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i128-immediate.ll
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i128-mul.ll
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i128-ret.ll
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i128-sdiv.ll
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i256-add.ll
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i386-setjmp-pic.ll
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i386-shrink-wrapping.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
i386-tlscall-fastregalloc.ll
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i486-fence-loop.ll
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i686-win-shrink-wrapping.ll
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iabs.ll [X86] Promote i16 SRA instructions to i32 2019-04-05 06:32:50 +00:00
icall-branch-funnel.ll
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icmp-opt.ll
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ident-metadata.ll
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ifunc-asm.ll
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illegal-bitfield-loadstore.ll
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illegal-insert.ll
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illegal-vector-args-return.ll
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immediate_merging.ll Revert r356688 "[X86] Don't avoid folding multiple use sign extended 8-bit immediate into instructions under optsize." 2019-03-25 01:25:32 +00:00
immediate_merging64.ll Revert r356688 "[X86] Don't avoid folding multiple use sign extended 8-bit immediate into instructions under optsize." 2019-03-25 01:25:32 +00:00
implicit-faultmap.ll For faulting ops, include a comment w/the fault destination 2019-03-12 21:05:31 +00:00
implicit-null-check-negative.ll
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implicit-null-check.ll [ImplicitNullChecks] Support unordered atomic accesses 2019-03-13 03:25:20 +00:00
implicit-null-checks.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
implicit-null-chk-reg-rewrite.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
implicit-use-spill.mir
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imul-lea-2.ll
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imul-lea.ll
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imul.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
inalloca-ctor.ll
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inalloca-invoke.ll
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inalloca-regparm.ll
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inalloca-stdcall.ll
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inalloca.ll
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inconsistent_landingpad.ll
…
indirect-branch-tracking-r2.ll [X86] [CET] Deal with return-twice function such as vfork, setjmp when 2019-05-22 00:50:21 +00:00
indirect-branch-tracking.ll
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indirect-hidden.ll
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init-priority.ll [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format 2019-05-15 02:35:32 +00:00
inline-0bh.ll
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inline-asm-2addr.ll
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inline-asm-A-constraint.ll
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inline-asm-R-constraint.ll
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inline-asm-avx-v-constraint-32bit.ll
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inline-asm-avx-v-constraint.ll
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inline-asm-avx512f-v-constraint.ll
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inline-asm-avx512f-x-constraint.ll [X86] Add VP2INTERSECT instructions 2019-05-31 02:50:41 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
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inline-asm-avx512vl-v-constraint.ll
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inline-asm-bad-constraint-n.ll
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inline-asm-bad-modifier.ll
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inline-asm-default-clobbers.ll [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. 2019-02-05 06:13:06 +00:00
inline-asm-duplicated-constraint.ll
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inline-asm-error.ll
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inline-asm-flag-clobber.ll
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inline-asm-flag-output.ll [X86] Fix copy-paste error in @ccz flag. 2019-02-21 15:28:31 +00:00
inline-asm-fpstack.ll [X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion 2019-02-15 21:59:33 +00:00
inline-asm-h.ll
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inline-asm-i-constraint-i1.ll [X86] Extend boolean arguments to inline-asm according to getBooleanType 2019-04-03 17:43:14 +00:00
inline-asm-modifier-V.ll
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inline-asm-modifier-c.ll [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
inline-asm-modifier-n.ll
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inline-asm-modifier-q.ll
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inline-asm-mrv.ll
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inline-asm-multilevel-gep.ll [TargetLowering] Handle multi depth GEPs w/ inline asm constraints 2019-05-13 17:27:44 +00:00
inline-asm-out-regs.ll
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inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
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inline-asm-q-regs.ll
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inline-asm-sp-clobber-memcpy.ll
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inline-asm-stack-realign.ll
…
inline-asm-stack-realign2.ll
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inline-asm-stack-realign3.ll
…
inline-asm-tied.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
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inline-sse.ll
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inlineasm-sched-bug.ll
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inreg.ll
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ins_split_regalloc.ll
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ins_subreg_coalesce-1.ll
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ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
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insert-into-constant-vector.ll Recommit r354363 "[X86][SSE] Generalize X86ISD::BLENDI support to more value types" 2019-02-23 21:41:42 +00:00
insert-loaded-scalar.ll [X86][AVX] Add VMOVDDUP-VPBROADCASTQ execution domain mapping 2019-02-01 21:41:30 +00:00
insert-positions.ll
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insert-prefetch-inline.afdo
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insert-prefetch-inline.ll
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insert-prefetch-invalid-instr.afdo
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insert-prefetch-invalid-instr.ll
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insert-prefetch-other.afdo
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insert-prefetch.afdo
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insert-prefetch.ll
…
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
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insertelement-ones.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
insertelement-shuffle.ll [X86][AVX] Update VBROADCAST folds to always use v2i64 X86vzload 2019-02-19 16:33:17 +00:00
insertelement-var-index.ll [X86][AVX] Add VMOVDDUP-VPBROADCASTQ execution domain mapping 2019-02-01 21:41:30 +00:00
insertelement-zero.ll [X86][AVX] Split VZEXT_MOVL ymm/zmm if the upper elements are not demanded. 2019-05-12 15:16:29 +00:00
insertps-O0-bug.ll
…
insertps-combine.ll
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insertps-from-constantpool.ll
…
insertps-unfold-load-bug.ll
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instr-symbols.mir
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int-intrinsic.ll
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intersect-fma-fmf.ll
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interval-update-remat.ll
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invalid-liveness.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
invalid-shift-immediate.ll
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invpcid-intrinsic.ll
…
ipra-inline-asm.ll
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ipra-local-linkage.ll
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ipra-reg-alias.ll
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ipra-reg-usage.ll [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. 2019-02-08 00:44:39 +00:00
ipra-transform.ll
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is-constant.ll Add a 'dynamic' parameter to the objectsize intrinsic 2019-01-30 20:34:35 +00:00
isel-optnone.ll
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isel-sink.ll
…
isel-sink2.ll
…
isel-sink3.ll
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isint.ll
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isnan.ll
…
isnan2.ll
…
ispositive.ll
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jump_sign.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
known-bits-vector.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
known-bits.ll
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known-signbits-vector.ll [x86] split 256-bit vector selects if operands are vector concats 2019-06-16 14:04:49 +00:00
kshift.ll [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. 2019-04-14 18:26:11 +00:00
label-annotation.ll [codeview] Fix SDNode representation of annotation labels 2019-05-15 21:46:05 +00:00
label-heapallocsite.ll Fix bug in getCompleteTypeIndex in codeview debug info 2019-05-06 23:37:03 +00:00
label-redefinition.ll
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lack-of-signed-truncation-check.ll [X86] Suppress load folding for add/sub with 128 immediate. 2019-03-06 07:36:36 +00:00
lakemont.ll
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large-code-model-isel.ll
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large-constants.ll
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large-gep-chain.ll
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large-gep-scale.ll
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large-global.ll
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large-pic-string.ll
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late-address-taken.ll
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late-remat-update-2.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
late-remat-update.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
ldzero.ll
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lea-2.ll [x86] update test checks; NFC 2019-04-15 17:38:47 +00:00
lea-3.ll [x86] update test checks; NFC 2019-04-15 17:38:47 +00:00
lea-4.ll [x86] update test checks; NFC 2019-04-15 17:38:47 +00:00
lea-5.ll
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lea-dagdag.ll [x86] try to widen 'shl' as part of LEA formation 2019-04-17 22:38:51 +00:00
lea-opt-cse1.ll
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lea-opt-cse2.ll
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lea-opt-cse3.ll
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lea-opt-cse4.ll
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lea-opt-memop-check-1.ll
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lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
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lea-recursion.ll
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lea.ll [X86] Regenerate LEA codegen tests 2019-04-03 12:33:16 +00:00
leaFixup32.mir [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
leaFixup64.mir [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
leaf-fp-elim.ll
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legalize-fmp-oeq-vector-select.ll
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legalize-libcalls.ll
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legalize-shift-64.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
legalize-shift.ll
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legalize-shl-vec.ll
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legalize-sub-zero-2.ll
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legalize-sub-zero.ll
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legalize-types-remapid.ll
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legalizedag_vec.ll
…
libcall-sret.ll
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licm-dominance.ll
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licm-nested.ll
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licm-regpressure.ll
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licm-symbol.ll
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lifetime-alias.ll [DAGCombiner] Fix invalid alias analysis. 2019-05-13 09:07:37 +00:00
limit-split-cost.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
limited-prec.ll
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linux-preemption.ll
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lit.local.cfg
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live-out-reg-info.ll
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live-range-nosubreg.ll
…
liveness-local-regalloc.ll
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llc-override-mcpu-mattr.ll
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llc-print-machineinstrs.mir
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llc-start-stop-instance.ll
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llrint-conv-i32.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
llrint-conv.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
llround-conv-i32.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
llround-conv.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
load-combine-dbg.ll
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load-combine.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
load-local-v3i1.ll [LegalizeVectorTypes] Allow single loads and stores for more short vectors 2019-03-27 20:35:56 +00:00
load-scalar-as-vector.ll [X86] Promote i16 SRA instructions to i32 2019-04-05 06:32:50 +00:00
load-slice.ll
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loadStore_vectorizer.ll
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loc-remat.ll
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local_stack_symbol_ordering.ll
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localescape.ll
…
log2_not_readnone.ll
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logical-load-fold.ll
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long-setcc.ll
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longlong-deadload.ll
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loop-blocks.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
loop-hoist.ll
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loop-rotate.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
loop-search.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
loop-strength-reduce-2.ll
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loop-strength-reduce-3.ll
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loop-strength-reduce-crash.ll
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loop-strength-reduce.ll
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loop-strength-reduce2.ll
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loop-strength-reduce4.ll
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loop-strength-reduce5.ll
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loop-strength-reduce6.ll
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loop-strength-reduce7.ll
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loop-strength-reduce8.ll
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lower-bitcast.ll
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lower-vec-shift-2.ll
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lower-vec-shift.ll [X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2. 2019-03-03 00:18:07 +00:00
lower-vec-shuffle-bug.ll
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lrint-conv-i32.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
lrint-conv.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
lround-conv-i32.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
lround-conv.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
lrshrink.ll
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lsr-crash-empty-uses.ll
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lsr-delayed-fold.ll
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lsr-i386.ll
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lsr-interesting-step.ll
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lsr-loop-exit-cond.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
lsr-negative-stride.ll
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lsr-nonaffine.ll
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lsr-normalization.ll
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lsr-overflow.ll
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lsr-quadratic-expand.ll
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lsr-redundant-addressing.ll
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lsr-reuse-trunc.ll
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lsr-reuse.ll
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lsr-sort.ll
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lsr-static-addr.ll [X86] Initial cleanups on the FixupLEAs pass. Separate Atom LEA creation from other LEA optimizations. 2019-04-30 17:56:28 +00:00
lsr-wrap.ll
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lwp-intrinsics-x86_64.ll
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lwp-intrinsics.ll [X86] Add a non-ambiguous check prefix to lwp-intrinsics.ll for the case when only the feature is specified and not the CPUs. 2019-05-08 19:20:53 +00:00
lzcnt-tzcnt.ll
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lzcnt-zext-cmp.ll [X86] AMD znver2 enablement 2019-02-26 16:55:10 +00:00
lzcnt.ll [X86] Regenerate LZCNT tests on x86/x32/x64 targets 2019-05-23 13:30:10 +00:00
machine-combiner-int-vec.ll [X86] Add the vector integer min/max instructions to isAssociativeAndCommutative. 2019-06-05 18:25:09 +00:00
machine-combiner-int.ll
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machine-combiner.ll [X86] Add avx512 command lines and test cases to machine-combiner.ll 2019-06-02 00:07:48 +00:00
machine-copy-prop.mir
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machine-cp-debug.mir
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machine-cp.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
machine-cse.ll
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machine-outliner-debuginfo.ll
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machine-outliner-disubprogram.ll
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machine-outliner-noredzone.ll
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machine-outliner-tailcalls.ll
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machine-outliner.ll
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machine-region-info.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
machine-sink-and-implicit-null-checks.ll
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machine-sink.ll
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machine-trace-metrics-crash.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
machinesink-merge-debuginfo.ll
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machinesink-null-debuginfo.ll
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macho-comdat.ll
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macho-trap.ll
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madd.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
mangle-question-mark.ll
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mask-negated-bool.ll
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masked-iv-safe.ll
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masked-iv-unsafe.ll
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masked_compressstore.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
masked_expandload.ll [X86][AVX] Add AVX512DQ coverage for masked memory ops tests (PR34584) 2019-04-28 10:02:34 +00:00
masked_gather.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
masked_gather_scatter.ll [DAGCombiner][X86] Fold away masked store and scatter with all zeroes mask. 2019-06-02 22:52:38 +00:00
masked_gather_scatter_widen.ll
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masked_load.ll [X86] Don't turn avx masked.load with constant mask into masked.load+vselect when passthru value is all zeroes. 2019-06-06 05:41:27 +00:00
masked_store.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
masked_store_trunc.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
masked_store_trunc_ssat.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
masked_store_trunc_usat.ll [MIR] Add simple PRE pass to MachineCSE 2019-06-09 12:15:47 +00:00
maskmovdqu.ll
…
materialize.ll
…
mature-mc-support.ll
…
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mcu-abi.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
mem-intrin-base-reg.ll
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mem-promote-integers.ll
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membarrier.ll
…
memcmp-mergeexpand.ll Re-land r360859: "[MergeICmps] Simplify the code." 2019-05-17 09:43:45 +00:00
memcmp-minsize.ll
…
memcmp-optsize.ll [ExpandMemCmp] Trigger on bcmp too. 2019-03-20 11:51:11 +00:00
memcmp.ll [ExpandMemCmp][NFC] Add tests for `memcmp(p, q, n) < 0` case. 2019-04-05 15:03:25 +00:00
memcpy-2.ll
…
memcpy-from-string.ll
…
memcpy-struct-by-value.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
memcpy.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
mempcpy-32.ll
…
mempcpy.ll
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memset-2.ll
…
memset-3.ll
…
memset-nonzero.ll [x86] split more 256-bit stores of concatenated vectors 2019-06-05 16:40:57 +00:00
memset-sse-stack-realignment.ll
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memset-zero.ll [Tests] Expand coverage of small memset zero idioms 2019-05-07 23:48:42 +00:00
memset.ll
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memset64-on-x86-32.ll
…
merge-consecutive-loads-128.ll
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merge-consecutive-loads-256.ll Recommit r354363 "[X86][SSE] Generalize X86ISD::BLENDI support to more value types" 2019-02-23 21:41:42 +00:00
merge-consecutive-loads-512.ll [X86] Call lowerShuffleAsBitMask for 512-bit vectors in lowerShuffleAsBlend. 2019-03-20 21:30:20 +00:00
merge-consecutive-stores-i1.ll
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merge-consecutive-stores-nt.ll [X86][SSE] Add SSE4A nt store tests on X86 as well as X64 2019-06-13 10:30:12 +00:00
merge-consecutive-stores.ll
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merge-sp-update-lea.ll
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merge-sp-updates-cfi.ll
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merge-store-constants.ll
…
merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
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merge_store.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
merge_store_duplicated_loads.ll
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mfence.ll
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midpoint-int-vec-128.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
midpoint-int-vec-256.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
midpoint-int-vec-512.ll [NFC][CodeGen][X86][AArch64] Add tests for C++ std::midpoint() pattern (PR40965) 2019-03-05 20:18:47 +00:00
midpoint-int.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
min-legal-vector-width.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
mingw-alloca.ll
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mingw-comdats-xdata.ll
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mingw-comdats.ll
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mingw-refptr.ll
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misaligned-memset.ll
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misched-aa-colored.ll
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misched-aa-mmos.ll
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misched-balance.ll
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misched-code-difference-with-debug.ll
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misched-copy.ll
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misched-crash.ll
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misched-fusion.ll
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misched-ilp.ll
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misched-matmul.ll
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misched-matrix.ll
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misched-new.ll
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misched_phys_reg_assign_order.ll Recommit r358211 "[X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2" 2019-04-11 19:19:42 +00:00
mmx-arg-passing-x86-64.ll
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mmx-arg-passing.ll
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mmx-arith.ll
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mmx-bitcast-fold.ll
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mmx-bitcast.ll
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mmx-build-vector.ll
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mmx-coalescing.ll
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mmx-copy-gprs.ll
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mmx-cvt.ll
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mmx-fold-load.ll
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mmx-fold-zero.ll
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mmx-intrinsics.ll
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mmx-only.ll
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mod128.ll
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movbe.ll
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movddup-load-fold.ll
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movdir-intrinsic-x86.ll
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movdir-intrinsic-x86_64.ll
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move_latch_to_loop_top.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
movfs.ll
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movgs.ll
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movmsk-cmp.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
movmsk.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
movntdq-no-avx.ll
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movpc32-check.ll
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movtopush.ll
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movtopush.mir
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movtopush64.ll
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ms-inline-asm-avx512.ll
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ms-inline-asm-redundant-clobber.ll
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ms-inline-asm.ll
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mul-constant-i8.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
mul-constant-i16.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
mul-constant-i32.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
mul-constant-i64.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
mul-constant-result.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
mul-i256.ll
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mul-i512.ll
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mul-i1024.ll
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mul-legalize.ll
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mul-remat.ll
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mul-shift-reassoc.ll
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mul64.ll
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mul128.ll [X86] Add PR13897 test case (i128 mul on i686) 2019-03-22 17:52:21 +00:00
mul128_sext_loop.ll
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mulo-pow2.ll [SDAG] Recursively legalize both vector mulo results 2019-05-10 20:42:48 +00:00
muloti.ll
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mult-alt-generic-i686.ll
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mult-alt-generic-x86_64.ll
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mult-alt-x86.ll
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multiple-loop-post-inc.ll
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multiple-return-values-cross-block.ll
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mulvi32.ll [DAGCombiner] narrow shuffle of concatenated vectors 2019-04-12 16:31:56 +00:00
mulx32.ll
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mulx64.ll
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musttail-fastcall.ll
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musttail-indirect.ll
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musttail-thiscall.ll
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musttail-varargs.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
musttail.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
mwaitx.ll [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead. 2019-04-03 23:28:30 +00:00
named-reg-alloc.ll
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named-reg-notareg.ll
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nancvt.ll
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narrow-shl-cst.ll [X86] Don't turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) if the original AND can represented by MOVZX. 2019-04-20 04:38:53 +00:00
narrow-shl-load.ll
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narrow_op-1.ll
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neg-of-3ops-lea.ll [X86][Codegen] Add missed pattern that may be a lea+neg 2019-06-08 19:38:14 +00:00
neg-shl-add.ll
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neg_cmp.ll
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neg_fp.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
negate-add-zero.ll [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format 2019-05-15 02:35:32 +00:00
negate-i1.ll
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negate-shift.ll
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negate.ll
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negative-offset.ll [NFC][X86] Autogenerate negative-offset.ll test 2019-05-22 15:34:43 +00:00
negative-sin.ll
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negative-stride-fptosi-user.ll
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negative-subscript.ll
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negative_zero.ll
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new-remat.ll
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newline-and-quote.ll
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no-and8ri8.ll
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no-cmov.ll
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no-plt-libcalls.ll
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no-plt.ll
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no-prolog-kill.ll
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no-sse2-avg.ll
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no-stack-arg-probe.ll
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nobt.ll
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nocf_check.ll
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nocx16.ll
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non-lazy-bind.ll
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non-unique-sections.ll
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non-value-mem-operand.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
nonconst-static-ev.ll
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nonconst-static-iv.ll
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nontemporal-2.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
nontemporal-3.ll [X86][SSE] Add tests for underaligned nt stores 2019-06-13 10:41:56 +00:00
nontemporal-loads.ll [X86][SSE] VSELECT(XOR(Cond,-1), LHS, RHS) --> VSELECT(Cond, RHS, LHS) 2019-03-06 10:54:43 +00:00
nontemporal.ll
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noreturn-call.ll
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norex-subreg.ll
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nosse-error1.ll
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nosse-error2.ll
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nosse-varargs.ll
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nosse-vector.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
not-and-simplify.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
note-cet-property.ll
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note-sections.ll
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null-streamer.ll
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objc-gc-module-flags.ll
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object-size.ll
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oddshuffles.ll [x86] split more 256-bit stores of concatenated vectors 2019-06-05 16:40:57 +00:00
oddsubvector.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
opaque-constant-asm.ll
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opt-ext-uses.ll
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opt-shuff-tstore.ll
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opt_phis.mir
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opt_phis2.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
optimize-max-0.ll
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optimize-max-1.ll
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optimize-max-2.ll
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optimize-max-3.ll
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or-address.ll
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or-branch.ll
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or-lea.ll
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osx-private-labels.ll
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overflow-intrinsic-setcc-fold.ll
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overflow.ll
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overlap-shift.ll
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packed_struct.ll
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packss.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
paddus.ll
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palignr.ll
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parity.ll
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partial-fold32.ll
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partial-fold64.ll
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partition.ll Add IR support, ELF section and user documentation for partitioning feature. 2019-05-29 03:29:01 +00:00
pass-three.ll
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patchable-prologue.ll
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patchpoint-invoke.ll
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patchpoint-verifiable.mir
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patchpoint-webkit_jscc.ll
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patchpoint.ll
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pause.ll
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peep-setb.ll
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peep-test-0.ll
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peep-test-1.ll
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peep-test-2.ll
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peep-test-3.ll
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peep-test-4.ll
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peephole-cvt-sse.ll
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peephole-fold-movsd.ll
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peephole-multiple-folds.ll
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peephole-na-phys-copy-folding.ll
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peephole-recurrence.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
peephole.mir Revert r359392 and r358887 2019-05-06 19:29:24 +00:00
personality.ll
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personality_size.ll
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phaddsub-extract.ll [X86][SSE] lowerAddSubToHorizontalOp - enable ymm extraction+fold 2019-05-02 14:00:55 +00:00
phaddsub-undef.ll [X86][SSE] LowerBuildVectorv4x32 - don't insert MOVQ for undef elts 2019-05-13 16:10:11 +00:00
phaddsub.ll [X86] isHorizontalBinOp - add extract_subvector(shuffle(x)) handling (PR39921) 2019-06-02 15:47:49 +00:00
phi-bit-propagation.ll
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phi-immediate-factoring.ll
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phielim-split.ll
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phys-reg-local-regalloc.ll
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phys_subreg_coalesce-2.ll
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phys_subreg_coalesce-3.ll
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phys_subreg_coalesce.ll
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physreg-pairs-error.ll
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physreg-pairs.ll
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pic-load-remat.ll
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pic.ll
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pic_jumptable.ll
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pie.ll
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pku.ll [X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some custom lowering and new ISD opcodes instead. 2019-04-04 00:28:49 +00:00
pmaddubsw.ll
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pmovext.ll
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pmovsx-inreg.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
pmul.ll [X86] Add X86TargetLowering::isCommutativeBinOp override. 2019-03-29 11:25:58 +00:00
pmulh.ll
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pmulld.ll
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pointer-vector.ll
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pop-stack-cleanup-msvc.ll
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pop-stack-cleanup.ll
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popcnt.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
post-ra-sched-with-debug.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
post-ra-sched.ll
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postalloc-coalescing.ll
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postra-ignore-dbg-instrs.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
postra-licm.ll
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pow.75.ll [DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X)) 2019-02-08 19:50:58 +00:00
pow.ll
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powi.ll [X86] Regenerate powi tests to include i686 x87/sse targets 2019-03-22 18:04:28 +00:00
pr1462.ll
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pr1489.ll
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pr1505.ll
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pr1505b.ll
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pr2177.ll
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pr2182.ll
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pr2326.ll
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pr2585.ll
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pr2656.ll
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pr2659.ll
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pr2849.ll
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pr2924.ll
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pr2982.ll
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pr3154.ll
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pr3216.ll
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pr3241.ll
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pr3243.ll
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pr3244.ll
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pr3250.ll
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pr3317.ll
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pr3366.ll
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pr3457.ll
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pr3522.ll
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pr5145.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
pr7882.ll
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pr9127.ll
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pr9517.ll
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pr9743.ll
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pr10068.ll
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pr10475.ll
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pr10499.ll
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pr10523.ll
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pr10524.ll
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pr10525.ll
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pr10526.ll
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pr11202.ll
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pr11334.ll
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pr11415.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
pr11468.ll
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pr11985.ll
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pr11998.ll
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pr12360.ll
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pr12889.ll
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pr13209.ll
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pr13220.ll
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pr13458.ll
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pr13577.ll [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
pr13859.ll
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pr13899.ll
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pr14088.ll
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pr14098.ll
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pr14161.ll
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pr14204.ll
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pr14314.ll
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pr14333.ll
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pr14562.ll
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pr15267.ll
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pr15296.ll
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pr15309.ll
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pr15705.ll
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pr15981.ll
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pr16031.ll
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pr16360.ll
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pr16807.ll
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pr17546.ll
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pr17631.ll
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pr17764.ll
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pr18014.ll
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pr18054.ll
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pr18162.ll
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pr18344.ll
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pr18846.ll
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pr19049.ll
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pr20011.ll
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pr20012.ll
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pr20020.ll
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pr20088.ll
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pr21099.ll
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pr21792.ll
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pr22019.ll
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pr22103.ll
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pr22338.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
pr22473.ll [X86] Add test case for PR22473 2019-03-08 19:16:26 +00:00
pr22774.ll
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pr22970.ll
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pr23103.ll
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pr23246.ll
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pr23273.ll
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pr23603.ll
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pr23664.ll
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pr24139.ll
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pr24374.ll
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pr24602.ll
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pr25828.ll
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pr26350.ll
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pr26625.ll
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pr26652.ll
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pr26757.ll
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pr26835.ll
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pr26870.ll
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pr27071.ll
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pr27202.ll [X86] Add test cases from PR27202. 2019-03-27 23:12:19 +00:00
pr27501.ll
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pr27591.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
pr27681.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
pr28129.ll
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pr28173.ll
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pr28444.ll Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg 2019-04-10 18:00:41 +00:00
pr28472.ll
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pr28489.ll
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pr28515.ll
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pr28560.ll
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pr28824.ll
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pr29010.ll
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pr29022.ll
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pr29061.ll
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pr29112.ll [X86][AVX] combineX86ShuffleChain - combine shuffle(extractsubvector(x),extractsubvector(y)) 2019-06-05 12:56:53 +00:00
pr29170.ll
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pr29222.ll
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pr30284.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
pr30290.ll
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pr30430.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
pr30511.ll
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pr30562.ll [SelectionDAG] Add SimplifyDemandedBits handling for ISD::SCALAR_TO_VECTOR 2019-03-15 17:00:55 +00:00
pr30813.ll
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pr30821.mir
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pr31045.ll
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pr31088.ll
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pr31143.ll
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pr31242.ll
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pr31271.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
pr31323.ll
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pr31593.ll
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pr31773.ll
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pr31956.ll
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pr32108.ll
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pr32241.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr32256.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr32278.ll
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pr32282.ll [SelectionDAG] Use KnownBits::computeForAddSub/computeForAddCarry 2019-04-15 07:19:11 +00:00
pr32284.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr32329.ll [X86] Remove dead nodes left after ReplaceAllUsesWith calls during address matching 2019-04-24 18:02:07 +00:00
pr32340.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr32345.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr32368.ll
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pr32420.ll [X86] Promote i16 SRA instructions to i32 2019-04-05 06:32:50 +00:00
pr32451.ll
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pr32484.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
pr32515.ll
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pr32588.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
pr32610.ll [x86] auto-generate complete test checks; NFC 2019-03-22 15:33:55 +00:00
pr32659.ll
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pr32907.ll
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pr33010.ll Fix pr33010, a 2 year old crashing regression 2019-05-06 22:09:31 +00:00
pr33290.ll
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pr33349.ll [X86] Print %st(0) as %st when its implicit to the instruction. Continue printing it as %st(0) when its encoded in the instruction. 2019-02-04 04:15:10 +00:00
pr33396.ll
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pr33715.ll
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pr33747.ll
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pr33828.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
pr33954.ll
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pr33960.ll
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pr34080-2.ll [X86] Remove hasSideEffects=1 from the X87 pseudos with folded load. 2019-02-21 22:00:15 +00:00
pr34080.ll [X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion 2019-02-15 21:59:33 +00:00
pr34088.ll
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pr34137.ll
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pr34139.ll
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pr34149.ll
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pr34177.ll [X86][SSE] Constant fold PEXTRB/PEXTRW/EXTRACT_VECTOR_ELT nodes. 2019-03-16 15:02:00 +00:00
pr34271-1.ll
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pr34271.ll
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pr34292.ll
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pr34381.ll
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pr34397.ll
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pr34421.ll
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pr34592.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr34605.ll
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pr34629.ll
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pr34634.ll
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pr34653.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
pr34657.ll [X86][AVX] Add combineConcatVectors support to improve subvector handling 2019-03-13 16:37:30 +00:00
pr34855.ll
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pr35272.ll
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pr35316.ll
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pr35399.ll
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pr35443.ll
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pr35636.ll
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pr35761.ll
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pr35763.ll
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pr35765.ll
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pr35918.ll Recommit r354647 and r354648 "[LegalizeTypes] When promoting the result of EXTRACT_SUBVECTOR, also check if the input needs to be promoted. Use that to determine the element type to extract" 2019-02-23 19:51:32 +00:00
pr35972.ll
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pr35982.ll Recommit r352660 "[X86] Mark EMMS and FEMMS as clobbering MM0-7 and ST0-7." 2019-02-04 04:44:20 +00:00
pr36199.ll
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pr36274.ll
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pr36312.ll
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pr36553.ll
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pr36602.ll
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pr36865.ll
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pr37063.ll
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pr37264.ll
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pr37359.ll
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pr37499.ll
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pr37820.ll
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pr37826.ll
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pr37879.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
pr37916.ll
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pr38038.ll
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pr38185.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
pr38217.ll
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pr38533.ll
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pr38539.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
pr38639.ll
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pr38738.ll
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pr38743.ll Re-commit r355490 "[CodeGen] Omit range checks from jump tables when lowering switches with unreachable default" 2019-03-27 14:10:11 +00:00
pr38762.ll
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pr38763.ll
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pr38795.ll
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pr38803.ll
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pr38819.ll
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pr38865-2.ll
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pr38865-3.ll
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pr38865.ll
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pr38952.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
pr39098.ll [DAGCombine] Avoid CombineZExtLogicopShiftLoad if there is free ZEXT 2019-01-31 20:46:42 +00:00
pr39187-g.ll
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pr39243.ll [DebugInfo] Combine Trivial and NonTrivial flags 2019-04-11 20:25:10 +00:00
pr39666.ll [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compressstore intrinsics. 2019-03-21 17:38:52 +00:00
pr39733.ll
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pr39896.ll
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pr39926.ll
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pr40090.ll
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pr40289-64bit.ll
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pr40289.ll
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pr40529.ll [X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion 2019-02-15 21:59:33 +00:00
pr40539.ll [X86] Add ST0 as an implicit def/use of x87 load/store instructions during FP stackifying. 2019-02-04 18:43:55 +00:00
pr40631_deadstore_elision.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
pr40730.ll [X86][AVX] lowerShuffleAsLanePermuteAndPermute - fully populate the lane shuffle mask (PR40730) 2019-02-15 11:39:21 +00:00
pr40737.ll [X86] Fix LowerAsmOutputForConstraint. 2019-02-15 20:01:55 +00:00
pr40811.ll Recommit r354363 "[X86][SSE] Generalize X86ISD::BLENDI support to more value types" 2019-02-23 21:41:42 +00:00
pr40891.ll [X86] Add test case that was supposed to go with r355116. 2019-02-28 18:50:16 +00:00
pr40994.ll [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compressstore intrinsics. 2019-03-21 17:38:52 +00:00
pr41619.ll [X86] Add test case for mask register variant of PR41619 which should be fixed after r360552 2019-05-13 15:45:20 +00:00
pr41678.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
pr41748.ll [SelectionDAG][X86] Support inline assembly returning an mmx register into a type with fewer than 64 bits. 2019-05-06 19:50:14 +00:00
pre-coalesce-2.ll
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pre-coalesce.ll
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pre-coalesce.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
pre-ra-sched.ll
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prefer-avx256-lzcnt.ll
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prefer-avx256-mask-extend.ll [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. 2019-04-14 18:26:11 +00:00
prefer-avx256-mask-shuffle.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
prefer-avx256-popcnt.ll
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prefer-avx256-shift.ll
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prefer-avx256-trunc.ll
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prefer-avx256-wide-mul.ll
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prefetch.ll
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prefixdata.ll
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preserve_allcc64.ll
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preserve_mostcc64.ll
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private-2.ll
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private.ll
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probe-stack-x32.ll [X86] Fix stack probing on x32 (PR41477) 2019-04-20 07:25:46 +00:00
prolog-push-seq.ll
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prologepilog_deref_size.mir [DebugInfo] DW_OP_deref_size in PrologEpilogInserter. 2019-04-30 07:58:57 +00:00
prologue-epilogue-remarks.mir
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prologuedata.ll
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promote-assert-zext.ll
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promote-i16.ll
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promote-trunc.ll
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promote-vec3.ll
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promote.ll
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ps4-noreturn.ll
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ps4-ssp-nop.ll [PS4] Emit a trap after a stack-protector fail call. 2019-03-06 19:57:43 +00:00
pseudo_cmov_lower.ll
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pseudo_cmov_lower1.ll
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pseudo_cmov_lower2.ll [X86] Avoid codegen changes when DBG_VALUE appears between lowered selects 2019-03-04 10:56:02 +00:00
pshufb-mask-comments.ll
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pshufd-combine-crash.ll
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psubus.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
ptest.ll
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ptr-rotate.ll
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ptrtoint-constexpr.ll
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ptrtoint-narrow.ll [AsmPrinter] Treat a narrowing PtrToInt like Trunc 2019-05-23 16:29:09 +00:00
ptwrite32-intrinsic.ll
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ptwrite64-intrinsic.ll
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pull-binop-through-shift.ll [DAGCombiner] visitShiftByConstant(): drop bogus signbit check 2019-05-17 15:52:58 +00:00
pull-conditional-binop-through-shift.ll [NFC] Fixup FileCheck option name in tests added in rL360881 2019-05-16 12:39:34 +00:00
push-cfi-debug.ll
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push-cfi-obj.ll [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
push-cfi.ll
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ragreedy-bug.ll Codegen: Fixed perf branch_weights in couple of tests. NFC. 2019-04-15 09:30:31 +00:00
ragreedy-hoist-spill.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
ragreedy-last-chance-recoloring.ll
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rd-mod-wr-eflags.ll [CGP] add special-cases to form unsigned add with overflow (PR40486) 2019-02-24 15:31:27 +00:00
rdpid.ll
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rdpmc.ll
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rdrand-x86_64.ll
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rdrand.ll [X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs 2019-02-20 05:39:11 +00:00
rdseed-x86_64.ll
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rdseed.ll
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rdtsc-upgrade.ll
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rdtsc.ll
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read-fp-no-frame-pointer.ll
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recip-fastmath.ll [AsmPrinter] Remove hidden flag -print-schedule. 2019-02-04 12:51:26 +00:00
recip-fastmath2.ll [AsmPrinter] Remove hidden flag -print-schedule. 2019-02-04 12:51:26 +00:00
recip-pic.ll
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red-zone.ll
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red-zone2.ll
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reduce-trunc-shl.ll [x86] split more v8f32/v8i32 shuffles in lowering 2019-02-18 16:46:12 +00:00
regalloc-advanced-split-cost.ll
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regalloc-copy-hints.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
regalloc-fast-missing-live-out-spill.mir RegAllocFast: Set MayLiveAcrossBlocks when allocating uses 2019-05-27 20:37:31 +00:00
regalloc-reconcile-broken-hints.ll
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regalloc-spill-at-ehpad.ll
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regcall-no-plt.ll
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reghinting.ll
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regparm.ll
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regpressure.ll
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rem.ll
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rem_crash.ll
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remarks-section.ll [Remarks] Add string deduplication using a string table 2019-04-24 00:06:24 +00:00
remat-constant.ll
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remat-fold-load.ll
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remat-mov-0.ll
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remat-phys-dead.ll
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remat-scalar-zero.ll
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replace-load-and-with-bzhi.ll
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replace_unsupported_masked_mem_intrin.ll
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ret-addr.ll
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ret-i64-0.ll
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ret-mmx.ll
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retpoline-external.ll
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retpoline-regparm.ll
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retpoline.ll
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return-ext.ll
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return_zeroext_i2.ll
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returned-trunc-tail-calls.ll
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reverse_branches.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
rip-rel-address.ll
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rip-rel-lea.ll
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rodata-relocs.ll
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rot16.ll [X86] CombineOr - fold to generic funnel shifts 2019-02-09 20:34:59 +00:00
rot32.ll [X86] Add post-isel pseudos for rotate by immediate using SHLD/SHRD 2019-03-27 17:29:34 +00:00
rot64.ll [X86] Add post-isel pseudos for rotate by immediate using SHLD/SHRD 2019-03-27 17:29:34 +00:00
rotate-extract-vector.ll [X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C) 2019-05-25 18:02:17 +00:00
rotate-extract.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
rotate-multi.ll Add more rotate tests, including ORs of rotates 2019-03-21 17:14:22 +00:00
rotate.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
rotate2.ll
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rotate4.ll [x86] make 8-bit shl undesirable 2019-04-08 13:58:50 +00:00
rotate_vec.ll
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rounding-ops.ll
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rrlist-livereg-corrutpion.ll
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rtm.ll
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sad.ll [DAGCombiner] narrow vector binop with inserts/extract 2019-05-13 14:31:14 +00:00
sad_variations.ll
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sadd_sat.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
sadd_sat_vec.ll [SDAG] Vector op legalization for overflow ops 2019-05-20 16:09:22 +00:00
saddo-redundant-add.ll
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safestack.ll
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safestack_inline.ll
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safestack_ssp.ll
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sandybridge-loads.ll
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sar_fold.ll
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sar_fold64.ll
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sat-add.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
sbb.ll
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scalar-extract.ll
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scalar-fp-to-i64.ll [X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns. 2019-06-10 00:41:07 +00:00
scalar-int-to-fp.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
scalar-min-max-fill-operand.ll
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scalar_sse_minmax.ll
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scalar_widen_div.ll
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scalarize-bitcast.ll
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scalarize-fp.ll [DAGCombiner] generalize binop-of-splats scalarization 2019-04-23 13:16:41 +00:00
scatter-schedule.ll
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scavenger.mir
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scev-interchange.ll
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scheduler-backtracking.ll [DAGCombiner] Combine OR as ADD when no common bits are set 2019-04-23 10:01:08 +00:00
sdiv-exact.ll
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sdiv-pow2.ll
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section_mergeable_size.ll
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segmented-stacks-dynamic.ll
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segmented-stacks-standalone.ll
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segmented-stacks.ll
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seh-catch-all-win32.ll
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seh-catch-all.ll
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seh-catchpad.ll
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seh-except-finally.ll
…
seh-exception-code.ll
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seh-filter-no-personality.ll
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seh-finally.ll
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seh-localaddress.ll Fix the lowering issue of intrinsics llvm.localaddress on X86 2019-02-08 01:14:12 +00:00
seh-no-invokes.ll
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seh-safe-div-win32.ll
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seh-safe-div.ll
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seh-stack-realign.ll
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select-1-or-neg1.ll
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select-mmx.ll
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select-of-fp-constants.ll
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select-with-and-or.ll
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select.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
select_const.ll [x86] make 8-bit shl undesirable 2019-04-08 13:58:50 +00:00
select_meta.ll
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selectcc-to-shiftand.ll
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selectiondag-crash.ll
…
selectiondag-cse.ll
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selectiondag-debug-loc.ll
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selectiondag-dominator.ll
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selectiondag-order.ll
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setcc-combine.ll [TargetLowering] refactor setcc folds to fix another miscompile (PR40657) 2019-02-10 14:29:57 +00:00
setcc-logic.ll [DAGCombiner] convert logic-of-setcc into bit magic (PR40611) 2019-02-12 17:07:47 +00:00
setcc-lowering.ll [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. 2019-04-14 18:26:11 +00:00
setcc-narrowing.ll
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setcc-wide-types.ll [X86] Don't compare i128 through vector if construction not cheap (PR41971) 2019-05-22 06:47:06 +00:00
setcc.ll
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setjmp-spills.ll
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setoeq.ll
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setuge.ll
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sext-i1.ll [DAGCombiner] fold sext into decrement 2019-03-29 13:49:08 +00:00
sext-load.ll
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sext-ret-val.ll
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sext-setcc-self.ll
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sext-subreg.ll
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sext-trunc.ll
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sha.ll
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shadow-stack.ll
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shift-amount-mod.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
shift-and-x86_64.ll [X86] Add test cases for PR36721 (unnecessary andl for %cl when shifting) 2019-01-27 18:31:33 +00:00
shift-and.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
shift-avx2-crash.ll
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shift-bmi2.ll
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shift-coalesce.ll
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shift-codegen.ll
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shift-combine-crash.ll
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shift-combine.ll
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shift-double-x86_64.ll [X86] Improve use of SHLD/SHRD 2019-03-02 02:44:16 +00:00
shift-double.ll [X86] Improve use of SHLD/SHRD 2019-03-02 02:44:16 +00:00
shift-folding.ll
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shift-i128.ll
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shift-i256.ll
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shift-mask.ll [X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets (PR40758) 2019-05-14 15:21:28 +00:00
shift-one.ll
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shift-pair.ll
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shift-parts.ll
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shift-pcmp.ll
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shift_minsize.ll [SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS 2019-01-31 08:07:30 +00:00
shl-anyext.ll
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shl-crash-on-legalize.ll
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shl-i64.ll
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shl_elim.ll
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shl_undef.ll
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shrink-compare.ll
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shrink-fp-const1.ll
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shrink-fp-const2.ll
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shrink-wrap-chkstk-x86_64.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
shrink-wrap-chkstk.ll
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shrink-wrapping-vla.ll
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shrink_vmul-widen.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
shrink_vmul.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
shrink_vmul_sse.ll
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shrink_wrap_dbg_value.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
shrinkwrap-hang.ll
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shuffle-combine-crash-2.ll
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shuffle-combine-crash.ll
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shuffle-extract-subvector.ll [DAGCombine] Fix a miscompile when reducing BUILD_VECTORs to a shuffle 2019-03-19 16:52:00 +00:00
shuffle-of-insert.ll
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shuffle-of-splat-multiuses.ll
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shuffle-strided-with-offset-128.ll
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shuffle-strided-with-offset-256.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
shuffle-strided-with-offset-512.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
shuffle-vs-trunc-128-widen.ll
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shuffle-vs-trunc-128.ll
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shuffle-vs-trunc-256-widen.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
shuffle-vs-trunc-256.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
shuffle-vs-trunc-512-widen.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
shuffle-vs-trunc-512.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
sibcall-2.ll
…
sibcall-3.ll
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sibcall-4.ll
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sibcall-5.ll
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sibcall-6.ll
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sibcall-byval.ll
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sibcall-win64.ll
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sibcall.ll Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly" 2019-02-04 04:15:02 +00:00
signbit-shift.ll [DAGCombiner] Combine OR as ADD when no common bits are set 2019-04-23 10:01:08 +00:00
signed-truncation-check.ll [X86] Suppress load folding for add/sub with 128 immediate. 2019-03-06 07:36:36 +00:00
simple-register-allocation-read-undef.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
simple-zext.ll
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sincos-opt.ll [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two arguments where on is %st. 2019-02-04 17:28:18 +00:00
sincos.ll
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sink-addsub-of-const.ll [DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952) 2019-06-04 11:06:21 +00:00
sink-blockfreq.ll
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sink-cheap-instructions.ll
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sink-gep-before-mem-inst.ll
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sink-hoist.ll
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sink-local-value.ll
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sink-out-of-loop.ll
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sitofp.ll
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sjlj-baseptr.ll
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sjlj-eh.ll
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sjlj-shadow-stack-liveness.mir
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sjlj.ll
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slow-incdec.ll [X86] Lower ISD::UADDO to use the Z flag instead of C flag when the RHS is a constant 1 to encourage INC formation. 2019-02-03 07:25:06 +00:00
slow-pmulld.ll Revert rL356864 : [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG (PR40685) 2019-03-27 10:25:02 +00:00
slow-unaligned-mem.ll [X86] AMD znver2 enablement 2019-02-26 16:55:10 +00:00
small-byval-memcpy.ll
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smul-with-overflow.ll
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smul_fix.ll [Intrinsic] Expand SMULFIX to MUL, MULH[US], or [US]MUL_LOHI on vector arguments 2019-01-31 19:15:37 +00:00
smul_fix_sat.ll [Intrinsic] Signed Fixed Point Saturation Multiplication Intrinsic 2019-05-21 19:17:19 +00:00
smul_fix_sat_constants.ll [Intrinsic] Signed Fixed Point Saturation Multiplication Intrinsic 2019-05-21 19:17:19 +00:00
soft-fp-legal-in-HW-reg.ll
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soft-fp.ll
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soft-sitofp.ll
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speculative-load-hardening-call-and-ret.ll
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speculative-load-hardening-gather.ll
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speculative-load-hardening-indirect.ll X86: regenerate speculative-load-hardening-indirect.ll tests. NFC. 2019-04-02 22:44:46 +00:00
speculative-load-hardening.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
splat-const.ll
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splat-for-size.ll
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split-eh-lpad-edges.ll
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split-extend-vector-inreg.ll
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split-store.ll [DAGCombiner] Combine OR as ADD when no common bits are set 2019-04-23 10:01:08 +00:00
split-vector-bitcast.ll
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split-vector-rem.ll
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sqrt-fastmath-mir.ll [X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns. 2019-06-10 00:41:07 +00:00
sqrt-fastmath-tune.ll
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sqrt-fastmath.ll
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sqrt-partial.ll
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sqrt.ll
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sret-implicit.ll
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sse-align-0.ll
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sse-align-1.ll
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sse-align-2.ll
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sse-align-3.ll
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sse-align-4.ll
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sse-align-5.ll
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sse-align-6.ll
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sse-align-7.ll
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sse-align-8.ll
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sse-align-9.ll
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sse-align-10.ll
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sse-align-11.ll
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sse-align-12.ll
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sse-commute.ll
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sse-cvttp2si.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse-domains.ll
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sse-fcopysign.ll
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sse-fsignum.ll
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sse-intel-ocl.ll
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sse-intrinsics-fast-isel-x86_64.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse-intrinsics-fast-isel.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse-intrinsics-x86-upgrade.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse-intrinsics-x86.ll
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sse-intrinsics-x86_64-upgrade.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse-intrinsics-x86_64.ll
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sse-load-ret.ll
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sse-minmax.ll [DAGCombine] SimplifySelectCC - call FoldSetCC with the setcc result type 2019-03-21 14:07:18 +00:00
sse-only.ll
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sse-regcall.ll
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sse-scalar-fp-arith-unary.ll
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sse-scalar-fp-arith.ll [X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns. 2019-06-11 04:30:53 +00:00
sse-unaligned-mem-feature.ll
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sse-varargs.ll
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sse1-fcopysign.ll
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sse1.ll
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sse2-intrinsics-canonical.ll
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sse2-intrinsics-fast-isel-x86_64.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse2-intrinsics-fast-isel.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse2-intrinsics-x86-upgrade.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse2-intrinsics-x86.ll [X86] Restore the pavg intrinsics. 2019-04-15 17:17:35 +00:00
sse2-intrinsics-x86_64-upgrade.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
sse2-intrinsics-x86_64.ll
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sse2-vector-shifts.ll [X86][SSE] Disable shouldFoldConstantShiftPairToMask for btver1/btver2 targets (PR40758) 2019-04-26 10:49:13 +00:00
sse2.ll [X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2. 2019-03-03 00:18:07 +00:00
sse3-avx-addsub-2.ll [X86][AVX] Prefer to combine shuffle to broadcasts whenever possible 2019-01-30 16:19:19 +00:00
sse3-avx-addsub.ll
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sse3-intrinsics-fast-isel.ll
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sse3-intrinsics-x86.ll [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead. 2019-04-03 23:28:30 +00:00
sse3.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
sse4a-intrinsics-fast-isel.ll
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sse4a-upgrade.ll
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sse4a.ll
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sse41-intrinsics-fast-isel.ll
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sse41-intrinsics-x86-upgrade.ll
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sse41-intrinsics-x86.ll
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sse41-pmovxrm.ll
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sse41.ll
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sse42-intrinsics-fast-isel-x86_64.ll
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sse42-intrinsics-fast-isel.ll
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sse42-intrinsics-x86.ll
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sse42-intrinsics-x86_64.ll
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sse_partial_update.ll
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sse_reload_fold.ll
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ssp-data-layout.ll
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ssp-guard-spill.ll
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ssse3-intrinsics-fast-isel.ll
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ssse3-intrinsics-x86.ll
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ssub_sat.ll [X86] Promote i8 CMOV's (PR40965) 2019-03-15 21:17:53 +00:00
ssub_sat_vec.ll [SDAG] Vector op legalization for overflow ops 2019-05-20 16:09:22 +00:00
stack-align-memcpy.ll [NFC] Update memcpy tests 2019-05-06 09:46:50 +00:00
stack-align.ll
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stack-align2.ll
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stack-folding-3dnow.ll
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stack-folding-adx-x86_64.ll
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stack-folding-adx.mir [X86] Merge the different SETcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:27:49 +00:00
stack-folding-avx512bf16.ll [X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables. 2019-06-01 06:20:59 +00:00
stack-folding-avx512vp2intersect.ll [X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables. 2019-06-01 06:20:59 +00:00
stack-folding-bmi.ll
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stack-folding-bmi2.ll
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stack-folding-bmi2.mir
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stack-folding-fp-avx1.ll [X86] Don't prevent load folding for cvtsi2ss/cvtsi2sd based on hasPartialRegUpdate. 2019-02-16 03:34:54 +00:00
stack-folding-fp-avx512.ll [X86] Make a bunch of merge masked binops commutable for loading folding. 2019-06-06 21:00:04 +00:00
stack-folding-fp-avx512vl.ll
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stack-folding-fp-sse42.ll [X86] Don't prevent load folding for cvtsi2ss/cvtsi2sd based on hasPartialRegUpdate. 2019-02-16 03:34:54 +00:00
stack-folding-int-avx1.ll
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stack-folding-int-avx2.ll [x86] make stack folding tests immune to unrelated transforms; NFC 2019-04-03 16:33:24 +00:00
stack-folding-int-avx512.ll [X86] Make a bunch of merge masked binops commutable for loading folding. 2019-06-06 21:00:04 +00:00
stack-folding-int-avx512vl.ll
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stack-folding-int-sse42.ll
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stack-folding-lwp.ll
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stack-folding-mmx.ll
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stack-folding-sha.ll
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stack-folding-tbm.ll
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stack-folding-x86_64.ll
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stack-folding-xop.ll
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stack-probe-red-zone.ll
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stack-probe-size.ll
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stack-probes.ll
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stack-protector-dbginfo.ll
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stack-protector-msvc.ll
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stack-protector-remarks.ll
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stack-protector-target.ll
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stack-protector-vreg-to-vreg-copy.ll
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stack-protector-weight.ll
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stack-protector.ll StackProtector: Use PointerMayBeCaptured 2019-06-12 14:23:33 +00:00
stack-size-section-function-sections.ll
…
stack-size-section.ll
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stack-update-frame-opcode.ll
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stack_guard_remat.ll
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stackguard-internal.ll
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stackmap-fast-isel.ll
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stackmap-frame-setup.ll
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stackmap-large-constants.ll
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stackmap-large-location-size.ll
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stackmap-liveness.ll
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stackmap-nops.ll
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stackmap-shadow-optimization.ll
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stackmap.ll
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stackpointer.ll
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statepoint-allocas.ll [Test] Use autogenerated checks for more statepoint tests 2019-02-12 00:12:46 +00:00
statepoint-call-lowering.ll [Test] Use autogenerated checks for more statepoint tests 2019-02-12 00:12:46 +00:00
statepoint-far-call.ll [Test] Use autogenerated checks for more statepoint tests 2019-02-12 00:12:46 +00:00
statepoint-forward.ll
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statepoint-gctransition-call-lowering.ll
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statepoint-invoke.ll [Test] Use autogenerated checks for more statepoint tests 2019-02-12 00:12:46 +00:00
statepoint-live-in.ll [Tests] A few more live-in deopt lowering tests 2019-02-12 23:00:07 +00:00
statepoint-stack-usage.ll
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statepoint-stackmap-format.ll
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statepoint-uniqueing.ll [Tests] Fill out a few tests around gc relocation uniquing 2019-02-12 00:01:39 +00:00
statepoint-vector-bad-spill.ll
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statepoint-vector.ll
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stdarg.ll
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stdcall-notailcall.ll
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stdcall.ll
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store-empty-member.ll
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store-fp-constant.ll
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store-global-address.ll
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store-narrow.ll
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store-zero-and-minus-one.ll
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store_op_load_fold.ll
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store_op_load_fold2.ll
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stores-merging.ll [DAGCombine] Fold overlapping constant stores 2019-02-22 16:00:19 +00:00
storetrunc-fp.ll
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stride-nine-with-base-reg.ll
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stride-reuse.ll
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sttni.ll
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sub-with-overflow.ll [DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immediate RHS to SADDO by negating the immediate. 2019-04-09 18:33:56 +00:00
sub.ll
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subcarry.ll
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subreg-to-reg-0.ll
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subreg-to-reg-1.ll
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subreg-to-reg-2.ll
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subreg-to-reg-3.ll
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subreg-to-reg-4.ll
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subreg-to-reg-6.ll
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subvector-broadcast.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
sunkaddr-ext.ll
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swap.ll Revert r357256 "[DAGCombine] Improve Lifetime node chains." 2019-04-03 07:41:58 +00:00
swift-error.ll
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swift-return.ll RegAllocFast: Improve hinting heuristic 2019-05-16 12:50:39 +00:00
swiftcc.ll [X86] Enable tail calls for CallingConv::Swift 2019-04-05 20:18:25 +00:00
swifterror.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
swiftself.ll [FastISel] Skip creating unnecessary vregs for arguments 2019-06-10 16:53:37 +00:00
switch-bt.ll
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switch-crit-edge-constant.ll
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switch-default-only.ll
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switch-density.ll
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switch-edge-weight.ll
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switch-jump-table.ll Re-commit r355490 "[CodeGen] Omit range checks from jump tables when lowering switches with unreachable default" 2019-03-27 14:10:11 +00:00
switch-lower-peel-top-case.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
switch-or.ll
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switch-order-weight.ll
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switch-zextload.ll
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switch.ll Switch lowering: exploit unreachable fall-through when lowering case range cluster 2019-03-29 13:40:05 +00:00
swizzle-2.ll
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swizzle-avx2.ll
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system-intrinsics-64-xsave.ll
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system-intrinsics-64-xsavec.ll
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system-intrinsics-64-xsaveopt.ll
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system-intrinsics-64-xsaves.ll
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system-intrinsics-64.ll
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system-intrinsics-xgetbv.ll
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system-intrinsics-xsave.ll
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system-intrinsics-xsavec.ll
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system-intrinsics-xsaveopt.ll
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system-intrinsics-xsaves.ll
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system-intrinsics-xsetbv.ll
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system-intrinsics.ll
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tail-call-attrs.ll
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tail-call-casts.ll
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tail-call-conditional.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
tail-call-got.ll
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tail-call-legality.ll
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tail-call-mutable-memarg.ll
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tail-call-parameter-attrs-mismatch.ll
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tail-call-win64.ll
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tail-dup-addr.ll
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tail-dup-catchret.ll
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tail-dup-debugloc.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
tail-dup-merge-loop-headers.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
tail-dup-no-other-successor.ll
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tail-dup-repeat.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
tail-merge-after-mbp.mir [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
tail-merge-debugloc.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
tail-merge-identical.ll
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tail-merge-unreachable.ll
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tail-merge-wineh.ll
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tail-opts.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
tail-threshold.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
tailcall-64.ll
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tailcall-calleesave.ll
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tailcall-cgp-dup.ll [CGP] Look through bitcasts when duplicating returns for tail calls 2019-04-23 21:57:46 +00:00
tailcall-disable.ll
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tailcall-fastisel.ll
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tailcall-largecode.ll
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tailcall-lifetime-end.ll
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tailcall-mem-intrinsics.ll
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tailcall-msvc-conventions.ll
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tailcall-multiret.ll
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tailcall-pseudo-64.mir [X86] Preserve operand flag when expanding TCRETURNri 2019-04-05 20:18:21 +00:00
tailcall-pseudo.mir [X86] Preserve operand flag when expanding TCRETURNri 2019-04-05 20:18:21 +00:00
tailcall-readnone.ll
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tailcall-returndup-void.ll
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tailcall-ri64.ll
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tailcall-stackalign.ll
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tailcall-structret.ll
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tailcall.ll
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tailcallbyval.ll
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tailcallbyval64.ll
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tailcallfp.ll
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tailcallfp2.ll
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tailcallpic1.ll
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tailcallpic2.ll
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tailcallpic3.ll
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tailcallstack64.ll
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taildup-crash.ll Fixed typos in tests: s/CEHCK/CHECK/ 2019-02-25 13:12:33 +00:00
tailjmp_gotpcrel_relax_relocation.ll
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targetLoweringGeneric.ll
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tbm-intrinsics-fast-isel-x86_64.ll
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tbm-intrinsics-fast-isel.ll
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tbm-intrinsics-x86_64.ll
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tbm-intrinsics.ll
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tbm_patterns.ll
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test-nofold.ll
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test-shrink-bug.ll [Codegen] Merge tail blocks with no successors after block placement 2019-06-13 18:11:32 +00:00
test-shrink.ll
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test-vs-bittest.ll
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test_x86condbr_globaladdr.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
testb-je-fusion.ll [X86] Make the post machine scheduler macrofusion-aware. 2019-04-03 09:37:30 +00:00
testl-commute.ll
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this-return-64.ll
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throws-cfi-fp.ll
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throws-cfi-no-fp.ll
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tls-addr-non-leaf-function.ll
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tls-android-negative.ll
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tls-android.ll
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tls-local-dynamic.ll
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tls-models.ll
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tls-no-plt.ll [X86] Support -fno-plt __tls_get_addr calls 2019-05-23 01:05:13 +00:00
tls-pic.ll
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tls-pie.ll
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tls-shrink-wrapping.ll
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tls-windows-itanium.ll [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
tls.ll
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tlv-1.ll
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tlv-2.ll
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tlv-3.ll
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token_landingpad.ll
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trap.ll
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tree_way_unsigned_cmp.ll [NFC] Added test from PR19758 2019-06-09 15:12:46 +00:00
trunc-and.ll [DAGCombiner] prevent infinite looping by truncating 'and' (PR40793) 2019-02-21 16:01:48 +00:00
trunc-ext-ld-st.ll [DAGCombiner] loosen restrictions for moving shuffles after vector binop 2019-04-03 13:42:06 +00:00
trunc-store.ll [X86] Avoid icmp undef in reduced tests 2019-03-13 18:36:59 +00:00
trunc-subvector.ll [x86] split more 256/512-bit shuffles in lowering 2019-02-07 17:10:49 +00:00
trunc-to-bool.ll [X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion 2019-02-15 21:59:33 +00:00
twoaddr-coalesce-2.ll
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twoaddr-coalesce-3.ll
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twoaddr-coalesce.ll
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twoaddr-dbg-value.mir
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twoaddr-lea.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
twoaddr-pass-sink.ll
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twoaddr-sink-terminator.ll
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uadd_sat.ll [x86] improve the default expansion of uaddsat/usubsat 2019-03-24 13:55:54 +00:00
uadd_sat_vec.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
uint64-to-float.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
uint_to_fp-2.ll
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uint_to_fp-3.ll
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uint_to_fp.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
umul-with-carry.ll
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umul-with-overflow.ll [SDAG] Use shift amount type in MULO promotion; NFC 2019-02-19 17:37:55 +00:00
umul_fix.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
umulo-64-legalisation-lowering.ll
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umulo-128-legalisation-lowering.ll
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unaligned-32-byte-memops.ll
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unaligned-load.ll
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unaligned-spill-folding.ll
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undef-eflags.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
undef-globals-bss.ll
…
undef-label.ll
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undef-ops.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll [X86] Enable 8-bit OR with disjoint bits to convert to LEA 2019-03-05 18:37:33 +00:00
unfold-masked-merge-scalar-constmask-interleavedbits.ll [X86] Enable 8-bit OR with disjoint bits to convert to LEA 2019-03-05 18:37:33 +00:00
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll [X86] Enable 8-bit OR with disjoint bits to convert to LEA 2019-03-05 18:37:33 +00:00
unfold-masked-merge-scalar-constmask-lowhigh.ll [X86] Enable 8-bit OR with disjoint bits to convert to LEA 2019-03-05 18:37:33 +00:00
unfold-masked-merge-scalar-variablemask.ll [DAGCombine] Fold (x & ~y) | y patterns 2019-03-17 15:45:38 +00:00
unfold-masked-merge-vector-variablemask-const.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
unfold-masked-merge-vector-variablemask.ll
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unknown-location.ll
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unreachable-loop-sinking.ll
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unreachable-mbb-undef-phi.mir
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unreachable-trap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
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unwind-init.ll
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unwindraise.ll
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update-terminator-debugloc.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
update-terminator.mir [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
urem-i8-constant.ll
…
urem-power-of-two.ll
…
urem-seteq-optsize.ll
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urem-seteq-vec-nonsplat.ll [TargetLowering] SimplifyDemandedBits - call SimplifyDemandedBits in bitcast handling 2019-04-09 10:27:59 +00:00
urem-seteq-vec-splat.ll [NFC] Make vector types legal in UREM test 2019-02-03 19:38:15 +00:00
urem-seteq.ll
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use-add-flags.ll
…
usub_sat.ll [x86] improve the default expansion of uaddsat/usubsat 2019-03-24 13:55:54 +00:00
usub_sat_vec.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
utf8.ll
…
utf16-cfstrings.ll
…
uwtables.ll
…
v2f32.ll
…
v4f32-immediate.ll
…
v4i32load-crash.ll
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v8i1-masks.ll
…
vaargs.ll
…
vaes-intrinsics-avx-x86.ll
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vaes-intrinsics-avx512-x86.ll
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vaes-intrinsics-avx512vl-x86.ll
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var-permute-128.ll [X86][SSE] Move extract_subvector(pshufb) fold to SimplifyDemandedVectorEltsForTargetNode 2019-05-01 10:58:38 +00:00
var-permute-256.ll
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var-permute-512.ll
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vararg-callee-cleanup.ll
…
vararg_no_start.ll
…
vararg_tailcall.ll
…
variable-sized-darwin-bzero.ll
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variadic-node-pic.ll
…
vastart-defs-eflags.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
vbinop-simplify-bug.ll
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vec-copysign-avx512.ll
…
vec-copysign.ll
…
vec-libcalls.ll
…
vec-loadsingles-alignment.ll
…
vec-trunc-store.ll
…
vec3.ll
…
vec_align.ll
…
vec_align_i256.ll
…
vec_anyext.ll
…
vec_call.ll
…
vec_cast.ll
…
vec_cast2.ll
…
vec_cast3.ll [X86] In FP_TO_INTHelper, when moving data from SSE register to X87 register file via the stack, use the same stack slot we use for the integer conversion. 2019-02-17 19:23:49 +00:00
vec_cmp_sint-128.ll
…
vec_cmp_uint-128.ll
…
vec_compare-sse4.ll
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vec_compare.ll
…
vec_ctbits.ll
…
vec_ext_inreg.ll
…
vec_extract-avx.ll
…
vec_extract-mmx.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
vec_extract-sse4.ll
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vec_extract.ll [x86] scalarize extract element 0 of FP math 2019-02-28 19:47:04 +00:00
vec_fabs.ll
…
vec_floor.ll [X86][InstCombine] Remove InstCombine code that turns X86 round intrinsics into llvm.ceil/floor. Remove some isel patterns that existed because that was happening. 2019-05-22 20:04:55 +00:00
vec_fneg.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
vec_fp_to_int-widen.ll [SelectionDAG] Add fpto[us]i(undef) --> undef constant fold 2019-06-04 10:04:55 +00:00
vec_fp_to_int.ll [SelectionDAG] Add fpto[us]i(undef) --> undef constant fold 2019-06-04 10:04:55 +00:00
vec_fpext.ll [X86] Remove avx512 isel patterns for fpextend+load. Prefer to only match fp extloads instead. 2019-05-31 06:21:53 +00:00
vec_fptrunc.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_i64.ll
…
vec_ins_extract-1.ll
…
vec_ins_extract.ll
…
vec_insert-2.ll
…
vec_insert-3.ll
…
vec_insert-4.ll
…
vec_insert-5.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
vec_insert-7.ll [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag. 2019-03-04 19:12:16 +00:00
vec_insert-8.ll
…
vec_insert-9.ll
…
vec_insert-mmx.ll
…
vec_int_to_fp-widen.ll [SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205) 2019-06-03 13:02:07 +00:00
vec_int_to_fp.ll [SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205) 2019-06-03 13:02:07 +00:00
vec_loadsingles.ll
…
vec_logical.ll Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests." 2019-06-13 19:24:51 +00:00
vec_minmax_match.ll
…
vec_minmax_sint.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
vec_minmax_uint.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
vec_partial.ll
…
vec_reassociate.ll
…
vec_return.ll
…
vec_round.ll
…
vec_saddo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_sdiv_to_shift.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
…
vec_set.ll
…
vec_setcc-2.ll [x86] use psubus for more vsetcc lowering (PR39859) 2019-04-23 15:20:17 +00:00
vec_setcc.ll
…
vec_shift.ll
…
vec_shift2.ll [X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm. 2019-03-15 11:05:42 +00:00
vec_shift3.ll
…
vec_shift4.ll
…
vec_shift5.ll
…
vec_shift6.ll
…
vec_shift7.ll
…
vec_shuf-insert.ll
…
vec_smulo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_split.ll
…
vec_ss_load_fold.ll
…
vec_ssubo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_trunc_sext.ll
…
vec_uaddo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_udiv_to_shift.ll
…
vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
…
vec_umulo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_unsafe-fp-math.ll
…
vec_usubo.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vec_zero-2.ll
…
vec_zero.ll [X86][SSE] Regenerate vector zero tests 2019-03-05 16:52:14 +00:00
vec_zero_cse.ll [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag. 2019-03-04 19:12:16 +00:00
vecloadextract.ll [DAGCombiner] Discard pointer info when combining extract_vector_elt of a vector load when the index isn't constant 2019-02-05 00:22:23 +00:00
vector-bitreverse.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
vector-blend.ll
…
vector-compare-all_of.ll [X86][SSE] Fold movmsk(not(x)) -> not(movmsk) 2019-05-17 17:56:25 +00:00
vector-compare-any_of.ll [X86][SSE] Fold movmsk(not(x)) -> not(movmsk) 2019-05-17 17:56:25 +00:00
vector-compare-combines.ll
…
vector-compare-results.ll
…
vector-compare-simplify.ll
…
vector-constrained-fp-intrinsics-fma.ll
…
vector-constrained-fp-intrinsics.ll Add constrained fptrunc and fpext intrinsics. 2019-05-13 13:23:30 +00:00
vector-ext-logic.ll [DAG] Refactor DAGCombiner::ReassociateOps 2019-04-29 17:50:10 +00:00
vector-extend-inreg.ll
…
vector-fshl-128.ll [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. 2019-04-14 18:26:11 +00:00
vector-fshl-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-fshl-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-fshl-rot-128.ll
…
vector-fshl-rot-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-fshl-rot-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-fshr-128.ll [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. 2019-04-14 18:26:11 +00:00
vector-fshr-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-fshr-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-fshr-rot-128.ll
…
vector-fshr-rot-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-fshr-rot-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-gep.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vector-half-conversions.ll [SelectionDAG][X86] Use stack load/store in PromoteIntRes_BITCAST when the input needs to be be split and the output type is a vector. 2019-04-25 18:19:59 +00:00
vector-idiv-sdiv-128.ll [DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2 2019-05-30 20:37:49 +00:00
vector-idiv-sdiv-256.ll [DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2 2019-05-30 20:37:49 +00:00
vector-idiv-sdiv-512.ll [DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2 2019-05-30 20:37:49 +00:00
vector-idiv-udiv-128.ll [X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C) 2019-05-25 18:02:17 +00:00
vector-idiv-udiv-256.ll [X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C) 2019-05-25 18:02:17 +00:00
vector-idiv-udiv-512.ll [X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C) 2019-05-25 18:02:17 +00:00
vector-idiv-v2i32.ll [X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm. 2019-03-15 11:05:42 +00:00
vector-idiv.ll
…
vector-interleave.ll
…
vector-intrinsics.ll
…
vector-lzcnt-128.ll
…
vector-lzcnt-256.ll
…
vector-lzcnt-512.ll [X86][AVX] isNOT - add extract_subvector(xor X, -1) -> extract_subvector(X) fold. 2019-05-17 14:04:56 +00:00
vector-merge-store-fp-constants.ll
…
vector-mul.ll [SelectionDAG] Add SimplifyDemandedBits handling for ISD::SCALAR_TO_VECTOR 2019-03-15 17:00:55 +00:00
vector-narrow-binop.ll [DAGCombiner] narrow vector binop with inserts/extract 2019-05-13 14:31:14 +00:00
vector-partial-undef.ll [TargetLowering] try harder to determine undef elements of vector binops 2019-02-01 15:35:12 +00:00
vector-pcmp.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
vector-popcnt-128.ll
…
vector-popcnt-256.ll
…
vector-popcnt-512.ll
…
vector-reduce-add-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-add.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-and-bool.ll [X86] Add avx512f tests for boolean reduction 2019-05-11 19:14:19 +00:00
vector-reduce-and-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-and.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fadd-fast.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-fadd.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-fmax-nnan.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmax.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmin-nnan.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmin.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-fmul-fast.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-fmul.ll Change semantics of fadd/fmul vector reductions. 2019-06-11 08:22:10 +00:00
vector-reduce-mul-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-mul.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-or-bool.ll [X86] Add avx512f tests for boolean reduction 2019-05-11 19:14:19 +00:00
vector-reduce-or-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-or.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-smax-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-smax.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-smin-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-smin.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-umax-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-umax.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-umin-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-umin.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-xor-bool.ll [DAGCombiner] narrow vector binop with inserts/extract 2019-05-13 14:31:14 +00:00
vector-reduce-xor-widen.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-reduce-xor.ll Improve reduction intrinsics by overloading result value. 2019-06-13 09:37:38 +00:00
vector-rem.ll
…
vector-rotate-128.ll
…
vector-rotate-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-rotate-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-sext-widen.ll [X86][SSE] Improve bool vector extload (PR26091) 2019-05-30 10:25:20 +00:00
vector-sext.ll [X86][SSE] Improve bool vector extload (PR26091) 2019-05-30 10:25:20 +00:00
vector-shift-ashr-128.ll
…
vector-shift-ashr-256.ll [DAGCombiner] try to move bitcast after extract_subvector 2019-05-12 14:43:20 +00:00
vector-shift-ashr-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-shift-ashr-sub128-widen.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
vector-shift-ashr-sub128.ll [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - handle repeated shift amounts 2019-03-19 17:23:25 +00:00
vector-shift-by-select-loop.ll [CodeGenPrepare][x86] shift both sides of a vector select when profitable 2019-06-16 15:29:03 +00:00
vector-shift-lshr-128.ll [CodeGenPrepare][x86] shift both sides of a vector select when profitable 2019-06-16 15:29:03 +00:00
vector-shift-lshr-256.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-shift-lshr-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-shift-lshr-sub128-widen.ll [SelectionDAG] Add icmp UNDEF handling to SelectionDAG::FoldSetCC 2019-03-25 18:51:57 +00:00
vector-shift-lshr-sub128.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
vector-shift-shl-128.ll [x86] move vector shift tests for PR37428; NFC 2019-06-14 15:23:09 +00:00
vector-shift-shl-256.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-shift-shl-512.ll [X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting 2019-05-01 13:51:09 +00:00
vector-shift-shl-sub128-widen.ll
…
vector-shift-shl-sub128.ll Revert rL356864 : [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG (PR40685) 2019-03-27 10:25:02 +00:00
vector-shuffle-128-unpck.ll [x86] prevent infinite looping from inverse shuffle transforms 2019-03-08 19:20:28 +00:00
vector-shuffle-128-v2.ll [X86][AVX] Add VMOVDDUP-VPBROADCASTQ execution domain mapping 2019-02-01 21:41:30 +00:00
vector-shuffle-128-v4.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-128-v8.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-128-v16.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-256-v4.ll [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c) 2019-06-12 16:38:20 +00:00
vector-shuffle-256-v8.ll [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c) 2019-06-12 16:38:20 +00:00
vector-shuffle-256-v16.ll [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c) 2019-06-12 16:38:20 +00:00
vector-shuffle-256-v32.ll [X86][AVX] combineX86ShuffleChain - combine shuffle(extractsubvector(x),extractsubvector(y)) 2019-06-05 12:56:53 +00:00
vector-shuffle-512-v8.ll [X86][AVX] Handle lane-crossing shuffle(extract_subvector(x,c1),extract_subvector(y,c2),m1) shuffles 2019-06-15 18:30:43 +00:00
vector-shuffle-512-v16.ll [X86][AVX] Combine shuffles extracted from a common vector 2019-04-26 09:56:14 +00:00
vector-shuffle-512-v32.ll [X86][AVX] X86ISD::PERMV/PERMV3 node types can never fold index ops 2019-04-16 19:18:53 +00:00
vector-shuffle-512-v64.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-avx512.ll [X86][AVX] Support shuffle combining for VBROADCAST with smaller vector sources 2019-02-03 16:51:33 +00:00
vector-shuffle-combining-avx.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx2.ll [X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV mask support 2019-04-11 14:35:45 +00:00
vector-shuffle-combining-avx512bw.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx512bwvl.ll
…
vector-shuffle-combining-avx512vbmi.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-combining-sse4a.ll
…
vector-shuffle-combining-sse41.ll
…
vector-shuffle-combining-ssse3.ll [SelectionDAG] Add SimplifyDemandedBits handling for ISD::SCALAR_TO_VECTOR 2019-03-15 17:00:55 +00:00
vector-shuffle-combining-xop.ll [X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3) 2019-06-15 17:05:24 +00:00
vector-shuffle-combining.ll [X86][SSE] Fold add(shuffle(),shuffle()) to hadd on 'slow' targets (PR39920) 2019-05-09 17:45:01 +00:00
vector-shuffle-masked.ll
…
vector-shuffle-mmx.ll
…
vector-shuffle-sse1.ll
…
vector-shuffle-sse4a.ll [X86][SSE] Use PSLLDQ/PSRLDQ to mask out zeroable ends of a shuffle 2019-02-01 16:02:12 +00:00
vector-shuffle-sse41.ll
…
vector-shuffle-v1.ll [X86][AVX] Combine non-lane crossing binary shuffles using X86ISD::VPERMV3 2019-04-28 14:31:01 +00:00
vector-shuffle-v48.ll
…
vector-shuffle-variable-128.ll
…
vector-shuffle-variable-256.ll
…
vector-sqrt.ll
…
vector-trunc-math-widen.ll [X86] combineVectorTruncationWithPACKUS - remove split/concatenation of mask 2019-04-18 17:23:09 +00:00
vector-trunc-math.ll [X86] combineVectorTruncationWithPACKUS - remove split/concatenation of mask 2019-04-18 17:23:09 +00:00
vector-trunc-packus-widen.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-packus.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-ssat-widen.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-ssat.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-usat-widen.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-usat.ll [x86] narrow extract subvector of vector select 2019-06-07 13:17:46 +00:00
vector-trunc-widen.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vector-trunc.ll [x86] split 256-bit store of concatenated vectors 2019-06-04 16:40:04 +00:00
vector-truncate-combine.ll
…
vector-tzcnt-128.ll
…
vector-tzcnt-256.ll
…
vector-tzcnt-512.ll
…
vector-unsigned-cmp.ll
…
vector-variable-idx.ll
…
vector-variable-idx2.ll
…
vector-width-store-merge.ll Make sure that the DAG combiner doesn't merge stores that we explicitly 2019-05-07 19:25:34 +00:00
vector-zext-widen.ll [X86] Enable custom splitting of v8i64/v16i32 sext/zext for avx/avx2 when input type will be promoted by the type legalize to 128-bits. 2019-02-23 00:35:02 +00:00
vector-zext.ll [SelectionDAG] computeKnownBits - support constant pool values from target 2019-05-24 10:03:11 +00:00
vector-zmov.ll
…
vector.ll
…
vector_splat-const-shift-of-constmasked.ll [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern tests 2019-05-14 20:17:04 +00:00
vectorcall.ll
…
version_directive.ll
…
vfcmp.ll
…
viabs.ll
…
virtreg-physreg-def-regallocfast.mir [RegAllocFast] Scan physcial reg definitions before assigning virtual reg definitions 2019-05-08 18:30:26 +00:00
virtual-registers-cleared-in-machine-functions-liveins.ll
…
visibility.ll
…
visibility2.ll
…
vmaskmov-offset.ll [DAGCombiner] Replace masked loads with a zero mask with the passthru value 2019-06-02 18:58:46 +00:00
vmovq.ll
…
volatile.ll
…
vortex-bug.ll
…
vp2intersect_multiple_pairs.ll [X86] Correct the ins operand order for MASKPAIR16STORE to match other store instructions. 2019-05-31 05:20:27 +00:00
vpshufbitqbm-intrinsics-upgrade.ll
…
vpshufbitqbm-intrinsics.ll
…
vsel-cmp-load.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
vselect-2.ll
…
vselect-avx.ll [x86] split 256-bit vector selects if operands are vector concats 2019-06-16 14:04:49 +00:00
vselect-constants.ll
…
vselect-minmax.ll
…
vselect-packss.ll
…
vselect-pcmp.ll
…
vselect-zero.ll
…
vselect.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
vshift-1.ll
…
vshift-2.ll
…
vshift-3.ll
…
vshift-4.ll
…
vshift-5.ll
…
vshift-6.ll
…
vshift_scalar.ll
…
vshift_split.ll
…
vshift_split2.ll
…
vsplit-and.ll
…
vzero-excess.ll
…
waitpkg-intrinsics.ll
…
warn-stack.ll
…
wbinvd-intrinsic.ll
…
wbnoinvd-intrinsic.ll
…
weak-undef.ll
…
weak.ll
…
weak_def_can_be_hidden.ll
…
webkit-jscc.ll
…
wide-fma-contraction.ll
…
wide-integer-cmp.ll
…
wide-integer-fold.ll
…
widen_arith-1.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_arith-2.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_arith-3.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_arith-4.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_arith-5.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_arith-6.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_bitops-0.ll
…
widen_bitops-1.ll
…
widen_cast-1.ll [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag. 2019-03-04 19:12:16 +00:00
widen_cast-2.ll [LegalizeVectorTypes] Allow single loads and stores for more short vectors 2019-03-27 20:35:56 +00:00
widen_cast-3.ll [LegalizeVectorTypes] Allow single loads and stores for more short vectors 2019-03-27 20:35:56 +00:00
widen_cast-4.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_compare-1.ll [DAG] Move integer setcc %x, %x folding into FoldSetCC 2019-03-13 11:08:57 +00:00
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
widen_conv-4.ll [X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i32 anyext(x))) 2019-03-15 19:14:28 +00:00
widen_conversions.ll
…
widen_extract-1.ll
…
widen_load-0.ll
…
widen_load-1.ll
…
widen_load-2.ll [TargetLowering] SimplifyDemandedBits - use DemandedElts in bitcast handling 2019-04-08 20:59:38 +00:00
widen_load-3.ll
…
widen_mul.ll
…
widen_shuffle-1.ll [DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag. 2019-03-04 19:12:16 +00:00
widened-broadcast.ll [X86][AVX] lowerShuffleAsBroadcast - improve load folding by avoiding bitcasts 2019-03-13 12:20:39 +00:00
win-alloca-expander.ll
…
win-catchpad-csrs.ll
…
win-catchpad-nested-cxx.ll
…
win-catchpad-nested.ll
…
win-catchpad-varargs.ll
…
win-catchpad.ll
…
win-cleanuppad.ll
…
win-funclet-cfi.ll
…
win-mixed-ehpersonality.ll
…
win-smallparams.ll
…
win32-bool.ll
…
win32-eh-available-externally.ll
…
win32-eh-states.ll
…
win32-eh.ll
…
win32-pic-jumptable.ll
…
win32-preemption.ll
…
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
…
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
…
win32-ssp.ll
…
win32_sret.ll
…
win64-bool.ll
…
win64-byval.ll
…
win64-jumptable.ll
…
win64-long-double.ll
…
win64-nosse-csrs.ll
…
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
…
win64_eh.ll
…
win64_eh_leaf.ll [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
win64_eh_leaf2.ll
…
win64_frame.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
win64_nonvol.ll
…
win64_params.ll
…
win64_sibcall.ll
…
win64_vararg.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
win_chkstk.ll
…
win_coreclr_chkstk.ll [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly. 2019-05-25 06:17:47 +00:00
win_coreclr_chkstk_liveins.mir
…
win_cst_pool.ll
…
windows-itanium-alloca.ll
…
wineh-coreclr.ll
…
wineh-exceptionpointer.ll
…
wineh-no-ehpads.ll
…
x32-cet-intrinsics.ll
…
x32-function_pointer-1.ll
…
x32-function_pointer-2.ll
…
x32-function_pointer-3.ll
…
x32-indirectbr.ll
…
x32-landingpad.ll
…
x32-lea-1.ll
…
x32-movtopush64.ll
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x32-va_start.ll
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x64-cet-intrinsics.ll
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x86-16.ll
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x86-32-intrcc.ll [X86] Fix bug in x86_intrcc with arg copy elision 2019-02-26 02:11:25 +00:00
x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll [X86] Use INSERT_SUBREG rather than SUBREG_TO_REG when creating LEA64_32 during isel. 2019-04-04 05:00:18 +00:00
x86-64-bittest-logic.ll
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x86-64-call.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
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x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
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x86-64-double-shifts-var.ll [X86] AMD znver2 enablement 2019-02-26 16:55:10 +00:00
x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
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x86-64-gv-offset.ll
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x86-64-intrcc-nosse.ll
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x86-64-intrcc.ll [X86] Fix bug in x86_intrcc with arg copy elision 2019-02-26 02:11:25 +00:00
x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll [X86] Fix bug in vectorcall calling convention 2019-02-26 19:48:16 +00:00
x86-big-ret.ll
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x86-cmov-converter.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll [x86] split more 256-bit stores of concatenated vectors 2019-06-05 16:40:57 +00:00
x86-interleaved-check.ll
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x86-interrupt_cc.ll
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x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_caller_saved_registers-preserve.ll [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. 2019-05-06 21:39:51 +00:00
x86-no_caller_saved_registers.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
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x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
x86-store-gv-addr.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
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x86_64-mul-by-const.ll
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x87.ll
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xaluo.ll [DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immediate RHS to SADDO by negating the immediate. 2019-04-09 18:33:56 +00:00
xchg-nofold.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
xmm-r64.ll
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xmulo.ll
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xop-ifma.ll
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xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
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xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
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xop-pcmov.ll
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xor-combine-debugloc.ll [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand. 2019-04-05 19:28:09 +00:00
xor-icmp.ll
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xor-select-i1-combine.ll
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xor.ll [DAGCombine][X86][AArch64][AMDGPU] (x - y) + -1 -> add (xor y, -1), x fold. Try 3 2019-05-30 20:37:29 +00:00
xray-attribute-instrumentation.ll
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xray-custom-log.ll
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xray-empty-firstmbb.mir
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xray-empty-function.mir
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xray-log-args.ll
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xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
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xray-section-group.ll
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xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xray-typed-event-log.ll
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xtest.ll
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zero-remat.ll
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zext-demanded.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-logicop-shift-load.ll [TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes. 2019-04-12 06:49:28 +00:00
zext-sext.ll [DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold. Try 3 2019-05-30 20:36:54 +00:00
zext-shl.ll
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zext-trunc.ll
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zlib-longest-match.ll
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