forked from OSchip/llvm-project
1d1cf30b73
Summary: SPE passes doubles the same as soft-float, in register pairs as i32 types. This is all handled by the target-independent layer. However, this is not optimal when splitting or reforming the doubles, as it pushes to the stack and loads from, on either side. For instance, to pass a double argument to a function, assuming the double value is in r5, the sequence currently looks like this: evstdd 5, X(1) lwz 3, X(1) lwz 4, X+4(1) Likewise, to form a double into r5 from args in r3 and r4: stw 3, X(1) stw 4, X+4(1) evldd 5, X(1) This optimizes the fence to use SPE instructions. Now, to pass a double to a function: mr 4, 5 evmergehi 3, 5, 5 And to form a double into r5 from args in r3 and r4: evmergelo 5, 3, 4 This is comparable to the way that gcc generates the double splits. This also fixes a bug with expanding builtins to libcalls, where the LowerCallTo() code path was generating intermediate illegal type nodes. Reviewers: nemanjai, hfinkel, joerg Subscribers: kbarton, jfb, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D54583 llvm-svn: 363526 |
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AArch64 | ||
AMDGPU | ||
ARC | ||
ARM | ||
AVR | ||
BPF | ||
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Hexagon | ||
Inputs | ||
Lanai | ||
MIR | ||
MSP430 | ||
Mips | ||
NVPTX | ||
PowerPC | ||
RISCV | ||
SPARC | ||
SystemZ | ||
Thumb | ||
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WebAssembly | ||
WinCFGuard | ||
WinEH | ||
X86 | ||
XCore |