forked from OSchip/llvm-project
83 lines
2.9 KiB
LLVM
83 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512cd | FileCheck %s
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declare <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
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define <8 x i64> @test_conflict_q(<8 x i64> %a) {
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; CHECK-LABEL: test_conflict_q:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpconflictq %zmm0, %zmm0
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; CHECK-NEXT: retq
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%res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 -1)
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ret <8 x i64> %res
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}
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declare <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
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define <16 x i32> @test_maskz_conflict_d(<16 x i32> %a, i16 %mask) {
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; CHECK-LABEL: test_maskz_conflict_d:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vpconflictd %zmm0, %zmm0 {%k1} {z}
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; CHECK-NEXT: retq
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%res = call <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 %mask)
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ret <16 x i32> %res
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}
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define <8 x i64> @test_mask_conflict_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
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; CHECK-LABEL: test_mask_conflict_q:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vpconflictq %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%res = call <8 x i64> @llvm.x86.avx512.mask.conflict.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
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ret <8 x i64> %res
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}
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define <16 x i32> @test_lzcnt_d(<16 x i32> %a) {
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; CHECK-LABEL: test_lzcnt_d:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vplzcntd %zmm0, %zmm0
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; CHECK-NEXT: retq
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%1 = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
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ret <16 x i32> %1
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}
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declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1) #0
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define <8 x i64> @test_lzcnt_q(<8 x i64> %a) {
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; CHECK-LABEL: test_lzcnt_q:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vplzcntq %zmm0, %zmm0
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; CHECK-NEXT: retq
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%1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
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ret <8 x i64> %1
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}
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declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1) #0
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define <16 x i32> @test_mask_lzcnt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
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; CHECK-LABEL: test_mask_lzcnt_d:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vplzcntd %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%1 = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %a, i1 false)
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%2 = bitcast i16 %mask to <16 x i1>
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%3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %b
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ret <16 x i32> %3
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}
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define <8 x i64> @test_mask_lzcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
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; CHECK-LABEL: test_mask_lzcnt_q:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: vplzcntq %zmm0, %zmm1 {%k1}
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; CHECK-NEXT: vmovdqa64 %zmm1, %zmm0
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; CHECK-NEXT: retq
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%1 = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %a, i1 false)
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%2 = bitcast i8 %mask to <8 x i1>
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%3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %b
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ret <8 x i64> %3
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}
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