forked from OSchip/llvm-project
184 lines
4.0 KiB
LLVM
184 lines
4.0 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; Instcombine should be able to eliminate all of these ext casts.
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declare void @use(i32)
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define i64 @test1(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 15
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%d = zext i32 %c to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK-LABEL: @test1(
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i64 @test2(i64 %a) {
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%b = trunc i64 %a to i32
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%c = shl i32 %b, 4
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%q = ashr i32 %c, 4
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%d = sext i32 %q to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK-LABEL: @test2(
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; CHECK: shl i64 %a, 36
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; CHECK: %d = ashr exact i64 {{.*}}, 36
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; CHECK: ret i64 %d
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}
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define i64 @test3(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 8
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%d = zext i32 %c to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK-LABEL: @test3(
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i64 @test4(i64 %a) {
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%b = trunc i64 %a to i32
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%c = and i32 %b, 8
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%x = xor i32 %c, 8
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%d = zext i32 %x to i64
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call void @use(i32 %b)
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ret i64 %d
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; CHECK-LABEL: @test4(
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; CHECK: = and i64 %a, 8
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; CHECK: = xor i64 {{.*}}, 8
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; CHECK-NOT: ext
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; CHECK: ret
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}
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define i32 @test5(i32 %A) {
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%B = zext i32 %A to i128
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%C = lshr i128 %B, 16
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%D = trunc i128 %C to i32
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ret i32 %D
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; CHECK-LABEL: @test5(
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; CHECK: %C = lshr i32 %A, 16
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; CHECK: ret i32 %C
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}
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define i32 @test6(i64 %A) {
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%B = zext i64 %A to i128
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%C = lshr i128 %B, 32
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%D = trunc i128 %C to i32
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ret i32 %D
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; CHECK-LABEL: @test6(
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; CHECK: %C = lshr i64 %A, 32
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; CHECK: %D = trunc i64 %C to i32
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; CHECK: ret i32 %D
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}
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define i92 @test7(i64 %A) {
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%B = zext i64 %A to i128
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%C = lshr i128 %B, 32
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%D = trunc i128 %C to i92
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ret i92 %D
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; CHECK-LABEL: @test7(
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; CHECK: %B = zext i64 %A to i92
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; CHECK: %C = lshr i92 %B, 32
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; CHECK: ret i92 %C
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}
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define i64 @test8(i32 %A, i32 %B) {
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%tmp38 = zext i32 %A to i128
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%tmp32 = zext i32 %B to i128
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%tmp33 = shl i128 %tmp32, 32
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%ins35 = or i128 %tmp33, %tmp38
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%tmp42 = trunc i128 %ins35 to i64
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ret i64 %tmp42
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; CHECK-LABEL: @test8(
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; CHECK: %tmp38 = zext i32 %A to i64
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; CHECK: %tmp32 = zext i32 %B to i64
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; CHECK: %tmp33 = shl nuw i64 %tmp32, 32
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; CHECK: %ins35 = or i64 %tmp33, %tmp38
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; CHECK: ret i64 %ins35
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}
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define i8 @test9(i32 %X) {
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%Y = and i32 %X, 42
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%Z = trunc i32 %Y to i8
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ret i8 %Z
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; CHECK-LABEL: @test9(
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; CHECK: trunc
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; CHECK: and
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; CHECK: ret
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}
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; rdar://8808586
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define i8 @test10(i32 %X) {
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%Y = trunc i32 %X to i8
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%Z = and i8 %Y, 42
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ret i8 %Z
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; CHECK-LABEL: @test10(
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; CHECK: trunc
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; CHECK: and
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; CHECK: ret
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}
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; PR25543
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; https://llvm.org/bugs/show_bug.cgi?id=25543
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; This is an extractelement.
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define i32 @trunc_bitcast1(<4 x i32> %v) {
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%bc = bitcast <4 x i32> %v to i128
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%shr = lshr i128 %bc, 32
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%ext = trunc i128 %shr to i32
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ret i32 %ext
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; CHECK-LABEL: @trunc_bitcast1(
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; CHECK-NEXT: %ext = extractelement <4 x i32> %v, i32 1
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; CHECK-NEXT: ret i32 %ext
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}
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; A bitcast may still be required.
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define i32 @trunc_bitcast2(<2 x i64> %v) {
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%bc = bitcast <2 x i64> %v to i128
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%shr = lshr i128 %bc, 64
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%ext = trunc i128 %shr to i32
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ret i32 %ext
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; CHECK-LABEL: @trunc_bitcast2(
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; CHECK-NEXT: %bc1 = bitcast <2 x i64> %v to <4 x i32>
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; CHECK-NEXT: %ext = extractelement <4 x i32> %bc1, i32 2
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; CHECK-NEXT: ret i32 %ext
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}
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; The right shift is optional.
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define i32 @trunc_bitcast3(<4 x i32> %v) {
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%bc = bitcast <4 x i32> %v to i128
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%ext = trunc i128 %bc to i32
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ret i32 %ext
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; CHECK-LABEL: @trunc_bitcast3(
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; CHECK-NEXT: %ext = extractelement <4 x i32> %v, i32 0
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; CHECK-NEXT: ret i32 %ext
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}
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; CHECK-LABEL: @trunc_shl_infloop(
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; CHECK: %tmp = lshr i64 %arg, 1
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; CHECK: %tmp21 = shl i64 %tmp, 2
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; CHECK: %tmp2 = trunc i64 %tmp21 to i32
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; CHECK: icmp sgt i32 %tmp2, 0
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define void @trunc_shl_infloop(i64 %arg) {
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bb:
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%tmp = lshr i64 %arg, 1
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%tmp1 = trunc i64 %tmp to i32
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%tmp2 = shl i32 %tmp1, 2
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%tmp3 = icmp sgt i32 %tmp2, 0
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br i1 %tmp3, label %bb2, label %bb1
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bb1:
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%tmp5 = sub i32 0, %tmp1
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%tmp6 = sub i32 %tmp5, 1
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unreachable
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bb2:
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unreachable
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}
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