llvm-project/llvm/test/CodeGen
Saleem Abdulrasool a6519b1d54 CodeGen: ensure that libcalls are always AAPCS CC
All of the builtins are designed to be invoked with ARM AAPCS CC even on ARM
AAPCS VFP CC hosts.  Tweak the default initialisation to ARM AAPCS CC rather
than C CC for ARM/thumb targets.

The changes to the tests are necessary to ensure that the calling convention for
the lowered library calls are honoured.  Furthermore, these adjustments cause
certain branch invocations to change to branch-and-link since the returned value
needs to be moved across registers (d0 -> r0, r1).

llvm-svn: 280683
2016-09-06 00:28:43 +00:00
..
AArch64 GlobalISel: add a G_PHI instruction to give phis a type. 2016-09-01 20:45:41 +00:00
AMDGPU AMDGPU: Reduce the duration of whole-quad-mode 2016-09-03 12:26:38 +00:00
ARM CodeGen: ensure that libcalls are always AAPCS CC 2016-09-06 00:28:43 +00:00
BPF
Generic CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses 2016-08-24 01:52:46 +00:00
Hexagon [Hexagon] Deal with undefs when extending live intervals 2016-09-01 13:59:35 +00:00
Inputs
Lanai Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag 2016-07-29 19:35:22 +00:00
MIR GlobalISel: forbid physical registers on generic MIs. 2016-08-30 18:52:46 +00:00
MSP430 Revert r279242 - it's failing the tests 2016-08-19 14:18:34 +00:00
Mips [mips] interAptiv based generic schedule model 2016-09-01 14:53:53 +00:00
NVPTX [NVPTX] Switch nvptx-use-infer-addrspace to true. 2016-08-19 20:46:45 +00:00
PowerPC [PowerPC] Zero-extend constants in FastISel 2016-09-04 06:07:19 +00:00
SPARC Revert "[Sparc] Leon errata fix passes." 2016-08-12 14:48:09 +00:00
SystemZ [SystemZ] Use valid base/index regs for inline asm 2016-08-18 21:44:15 +00:00
Thumb [ARM] Generate consistent frame records for Thumb2 2016-08-23 09:19:22 +00:00
Thumb2 CodeGen: ensure that libcalls are always AAPCS CC 2016-09-06 00:28:43 +00:00
WebAssembly [WebAssembly] Add asm.js-style setjmp/longjmp handling for wasm (reland r280302) 2016-09-01 21:05:15 +00:00
WinEH Revert EH-specific checks in BranchFolding that were causing blow ups in compile time. 2016-07-27 17:55:33 +00:00
X86 [AVX-512] Teach fastisel load/store handling to use EVEX encoded instructions for 128/256-bit vectors and scalar single/double. 2016-09-05 23:58:40 +00:00
XCore IR: Introduce Module::global_objects(). 2016-06-22 20:29:42 +00:00