| .. |
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AsmParser
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[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
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2017-05-31 16:26:47 +00:00 |
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Disassembler
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[AMDGPU] SDWA: add disassembler support for GFX9
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2017-05-26 15:52:00 +00:00 |
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InstPrinter
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[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
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2017-05-31 16:26:47 +00:00 |
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MCTargetDesc
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[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
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2017-05-26 18:01:29 +00:00 |
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TargetInfo
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
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Utils
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[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
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2017-05-31 16:26:47 +00:00 |
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AMDGPU.h
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPU.td
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[AMDGPU] SDWA: Add assembler support for GFX9
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2017-05-23 10:08:55 +00:00 |
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AMDGPUAliasAnalysis.cpp
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[IR] Make getParamAttributes take argument numbers, not ArgNo+1
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2017-04-13 23:12:13 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPU/R600: Fix amdgpu alias analysis pass.
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2017-03-31 19:26:23 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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[AMDGPU] Add GlobalOpt parameter to Always Inliner pass
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2017-03-30 20:16:02 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Remove error on call in AsmPrinter
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2017-06-01 15:05:15 +00:00 |
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AMDGPUAsmPrinter.h
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AMDGPU: Refactor AsmPrinter
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2017-05-02 17:14:00 +00:00 |
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AMDGPUCallLowering.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPUFrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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AMDGPUFrameLowering.h
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
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2017-05-24 14:53:50 +00:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Combine and (srl) into shl (bfe)
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2017-05-23 19:54:48 +00:00 |
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AMDGPUISelLowering.h
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[AMDGPU] Convert shl (add) into add (shl)
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2017-05-23 15:59:58 +00:00 |
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AMDGPUInstrInfo.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU: Fix crash when disassembling VOP3 mac
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2017-04-10 17:58:06 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU: Remove tfe bit from flat instruction definitions
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2017-05-11 17:38:33 +00:00 |
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AMDGPUInstructionSelector.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUInstructions.td
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[AMDGPU][MC] Added check for truncation of SOPK imm operand
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2017-04-26 15:34:19 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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Rename AttributeSet to AttributeList
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2017-03-21 16:57:19 +00:00 |
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AMDGPUIntrinsicInfo.h
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…
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|
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AMDGPUIntrinsics.td
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AMDGPU: Remove legacy bfe intrinsics
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2017-04-03 18:08:08 +00:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Mark 32-bit float constants as legal
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2017-05-26 16:40:03 +00:00 |
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AMDGPULegalizerInfo.h
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPULowerIntrinsics.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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AMDGPUMCInstLower.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]
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2017-05-16 04:01:23 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUMachineFunction.h
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AMDGPU: Rename isKernel
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2017-03-30 23:58:04 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
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AMDGPUPTNote.h
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[AMDGPU] Restructure code object metadata creation
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2017-03-22 22:32:22 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca
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2017-05-23 20:25:41 +00:00 |
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AMDGPURegisterBankInfo.cpp
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[RegisterBankInfo] Uniquely allocate instruction mapping.
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2017-05-05 22:48:22 +00:00 |
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AMDGPURegisterBankInfo.h
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[RegisterBankInfo] Uniquely allocate instruction mapping.
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2017-05-05 22:48:22 +00:00 |
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AMDGPURegisterBanks.td
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPURegisterInfo.td
|
…
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|
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AMDGPUSubtarget.cpp
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AMDGPU: Add new subtarget features for gfx9 flat instructions
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2017-05-10 21:19:05 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Require waitcnt before barrier for all targets; adjust tests.
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2017-05-30 16:22:43 +00:00 |
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AMDGPUTargetMachine.cpp
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TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFC
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2017-05-30 21:36:41 +00:00 |
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AMDGPUTargetMachine.h
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TargetMachine: Indicate whether machine verifier passes.
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2017-05-31 18:41:23 +00:00 |
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AMDGPUTargetObjectFile.cpp
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUTargetObjectFile.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Make some packed shuffles free
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2017-05-10 21:29:33 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Make some packed shuffles free
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2017-05-10 21:29:33 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPU: Unify divergent function exits.
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2017-03-24 19:52:05 +00:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Turn AMDGPUUnifyMetadata back into module pass
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2017-01-27 16:38:10 +00:00 |
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AMDILCFGStructurizer.cpp
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Remove unused functions. Remove static qualifier from functions in header files. NFC.
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2017-04-11 14:55:32 +00:00 |
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AMDKernelCodeT.h
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…
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|
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BUFInstructions.td
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AMDGPU: Change mubuf soffset register when SP relative
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2017-05-17 21:02:58 +00:00 |
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CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
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CMakeLists.txt
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Re-submit AMDGPUMachineCFGStructurizer.
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2017-05-15 20:18:37 +00:00 |
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CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
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DSInstructions.td
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[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
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2017-05-31 16:26:47 +00:00 |
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EvergreenInstructions.td
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AMDGPU: Fix unnecessary ands when packing f16 vectors
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2017-03-15 19:04:26 +00:00 |
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FLATInstructions.td
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AMDGPU: Remove tfe bit from flat instruction definitions
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2017-05-11 17:38:33 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU: Fix broken condition in hazard recognizer
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2017-03-17 21:36:28 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU: Fix broken condition in hazard recognizer
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2017-03-17 21:36:28 +00:00 |
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GCNIterativeScheduler.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNIterativeScheduler.h
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[AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler
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2017-03-21 13:15:46 +00:00 |
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GCNMinRegStrategy.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNRegPressure.cpp
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Make helper functions static. NFC.
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2017-05-26 20:09:00 +00:00 |
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GCNRegPressure.h
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[AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker
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2017-05-22 13:09:40 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Use GCNRPTracker dumper methods in scheduler
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2017-05-16 16:31:45 +00:00 |
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GCNSchedStrategy.h
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[AMDGPU] Cache live-ins and register pressure in scheduler
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2017-05-16 16:11:26 +00:00 |
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LLVMBuild.txt
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AMDGPU: Add GlobalISel to required_libraries.
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2017-01-28 18:13:08 +00:00 |
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MIMGInstructions.td
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AMDGPU: Remove legacy image intrinsics
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2017-04-04 16:34:35 +00:00 |
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Processors.td
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AMDGPU: Merge initial gfx9 support
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2017-02-18 18:29:53 +00:00 |
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R600ClauseMergePass.cpp
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[LegacyPassManager] Remove TargetMachine constructors
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2017-05-18 17:21:13 +00:00 |
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R600ControlFlowFinalizer.cpp
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[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
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R600Defines.h
|
…
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|
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R600EmitClauseMarkers.cpp
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AMDGPU/R600: Fix ALU clause markers use detection
|
2017-03-06 20:10:05 +00:00 |
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R600ExpandSpecialInstrs.cpp
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[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
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R600FrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
|
2017-03-10 19:39:07 +00:00 |
|
R600FrameLowering.h
|
[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
|
2017-03-10 19:39:07 +00:00 |
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R600ISelLowering.cpp
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
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2017-05-24 15:59:09 +00:00 |
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R600ISelLowering.h
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[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
|
2017-05-24 15:59:09 +00:00 |
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R600InstrFormats.td
|
AMDGPU/R600: Convert buffer id to VTX_READ input
|
2016-08-15 21:38:30 +00:00 |
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R600InstrInfo.cpp
|
Cyle -> Cycle; NFCI
|
2017-03-15 15:37:42 +00:00 |
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R600InstrInfo.h
|
Cyle -> Cycle; NFCI
|
2017-03-15 15:37:42 +00:00 |
|
R600Instructions.td
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[AMDGPU] Get address space mapping by target triple environment
|
2017-03-27 14:04:01 +00:00 |
|
R600Intrinsics.td
|
AMDGPU: Make intrinsics speculatable
|
2017-05-02 16:57:44 +00:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
…
|
|
|
R600MachineScheduler.h
|
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2016-12-09 22:06:55 +00:00 |
|
R600OptimizeVectorRegisters.cpp
|
[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
|
R600Packetizer.cpp
|
[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
|
R600RegisterInfo.cpp
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
R600RegisterInfo.h
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
R600RegisterInfo.td
|
[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
|
2017-05-23 21:27:15 +00:00 |
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
…
|
|
|
SIAnnotateControlFlow.cpp
|
Remove now useless trailing nullptr in StructType::get
|
2017-05-11 08:46:02 +00:00 |
|
SIDebuggerInsertNops.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIDefines.h
|
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
|
2017-05-31 16:26:47 +00:00 |
|
SIFixControlFlowLiveIntervals.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIFixSGPRCopies.cpp
|
AMDGPU: Fix copies from physical registers in SIFixSGPRCopies
|
2017-04-29 01:26:34 +00:00 |
|
SIFixVGPRCopies.cpp
|
[AMDGPU] Add VGPR copies post regalloc fix pass
|
2017-01-24 17:46:17 +00:00 |
|
SIFoldOperands.cpp
|
[AMDGPU] Allow SDWA in instructions with immediates and SGPRs
|
2017-05-30 16:49:24 +00:00 |
|
SIFrameLowering.cpp
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
SIFrameLowering.h
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
SIISelLowering.cpp
|
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
|
2017-05-24 15:59:09 +00:00 |
|
SIISelLowering.h
|
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
|
2017-05-24 15:59:09 +00:00 |
|
SIInsertSkips.cpp
|
AMDGPU: Rename SI_RETURN
|
2017-03-21 22:18:10 +00:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU] Fix bugs in new waitcnt pass. Add test.
|
2017-05-31 16:44:23 +00:00 |
|
SIInsertWaits.cpp
|
Move size and alignment information of regclass to TargetRegisterInfo
|
2017-04-24 18:55:33 +00:00 |
|
SIInstrFormats.td
|
[AMDGPU][MC] Fixed bugs in export instruction
|
2017-05-19 13:36:09 +00:00 |
|
SIInstrInfo.cpp
|
AMDGPU/GlobalISel: Mark 32-bit float constants as legal
|
2017-05-26 16:40:03 +00:00 |
|
SIInstrInfo.h
|
Re-submit AMDGPUMachineCFGStructurizer.
|
2017-05-15 20:18:37 +00:00 |
|
SIInstrInfo.td
|
[AMDGPU][MC] New syntax for ds_swizzle_b32 offset
|
2017-05-31 16:26:47 +00:00 |
|
SIInstructions.td
|
Re-submit AMDGPUMachineCFGStructurizer.
|
2017-05-15 20:18:37 +00:00 |
|
SIIntrinsics.td
|
AMDGPU: Remove legacy export intrinsic
|
2017-04-04 16:34:39 +00:00 |
|
SILoadStoreOptimizer.cpp
|
[LegacyPassManager] Remove TargetMachine constructors
|
2017-05-18 17:21:13 +00:00 |
|
SILowerControlFlow.cpp
|
[AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2017-01-20 17:52:16 +00:00 |
|
SILowerI1Copies.cpp
|
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
|
2017-01-13 09:58:52 +00:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
SIMachineFunctionInfo.h
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
SIMachineScheduler.cpp
|
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
|
2017-03-28 07:19:48 +00:00 |
|
SIMachineScheduler.h
|
[AMDGPU] Update SI scheduler colorHighLatenciesGroups
|
2017-03-28 07:19:48 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
|
2016-10-07 08:40:14 +00:00 |
|
SIPeepholeSDWA.cpp
|
[AMDGPU] Allow SDWA in instructions with immediates and SGPRs
|
2017-05-30 16:49:24 +00:00 |
|
SIRegisterInfo.cpp
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
SIRegisterInfo.h
|
AMDGPU: Set high getCSRFirstUseCost
|
2017-06-01 14:38:02 +00:00 |
|
SIRegisterInfo.td
|
AMDGPU: Fix not including v2i16/v2f16 in register class
|
2017-03-21 16:42:50 +00:00 |
|
SISchedule.td
|
AMDGPU: Implement early ifcvt target hooks.
|
2017-01-25 04:25:02 +00:00 |
|
SIShrinkInstructions.cpp
|
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
|
2017-01-13 09:58:52 +00:00 |
|
SITypeRewriter.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIWholeQuadMode.cpp
|
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
|
2016-12-09 22:06:55 +00:00 |
|
SMInstructions.td
|
Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
|
2017-05-24 14:53:50 +00:00 |
|
SOPInstructions.td
|
Resubmit r303859 with test fixed.
|
2017-05-26 20:38:26 +00:00 |
|
VIInstrFormats.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VIInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VOP1Instructions.td
|
[AMDGPU] SDWA: Add assembler support for GFX9
|
2017-05-23 10:08:55 +00:00 |
|
VOP2Instructions.td
|
[AMDGPU] SDWA: Add assembler support for GFX9
|
2017-05-23 10:08:55 +00:00 |
|
VOP3Instructions.td
|
[AMDGPU] SDWA: Add assembler support for GFX9
|
2017-05-23 10:08:55 +00:00 |
|
VOP3PInstructions.td
|
AMDGPU: Support v2i16/v2f16 packed operations
|
2017-02-27 22:15:25 +00:00 |
|
VOPCInstructions.td
|
[AMDGPU] SDWA: Add assembler support for GFX9
|
2017-05-23 10:08:55 +00:00 |
|
VOPInstructions.td
|
[AMDGPU] SDWA: Add assembler support for GFX9
|
2017-05-23 10:08:55 +00:00 |
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