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llvm-project/llvm/lib/Target/IA64
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Chris Lattner 12e97307a1 Completely rearchitect the interface between targets and the pass manager. 
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
 		2006-09-04 04:14:57 +00:00
..
.cvsignore ignore generated files 2005-09-07 23:47:44 +00:00
IA64.h remove a dead proto 2006-08-03 18:51:04 +00:00
IA64.td getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
IA64AsmPrinter.cpp Split SwitchSection into SwitchTo{Text|Data}Section methods. 2006-05-09 04:59:56 +00:00
IA64Bundling.cpp Added getTargetLowering() to TargetMachine. Refactored targets to support this. 2006-03-13 23:20:37 +00:00
IA64ISelDAGToDAG.cpp Do not use getTargetNode() and SelectNodeTo() which takes more than 3 2006-08-27 08:14:06 +00:00
IA64ISelLowering.cpp RET_FLAG has an optional input flag, but it does not produce a flag result. 2006-08-16 07:28:58 +00:00
IA64ISelLowering.h Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 2006-01-27 21:09:22 +00:00
IA64InstrBuilder.h There shalt be only one "immediate" operand type! 2006-05-04 17:21:20 +00:00
IA64InstrFormats.td add FP compares and implicit register defs to the dag isel 2005-10-31 01:42:11 +00:00
IA64InstrInfo.cpp add bundling! well not really, for now it's just stop-insertion. 2006-01-25 02:23:38 +00:00
IA64InstrInfo.h Remove trailing whitespace 2005-04-21 23:13:11 +00:00
IA64InstrInfo.td Remove a duplicate pattern. 2006-07-31 18:43:10 +00:00
IA64MachineFunctionInfo.h Remove trailing whitespace 2005-04-21 23:13:11 +00:00
IA64RegisterInfo.cpp Constify some methods. Patch provided by Anton Vayvod, thanks! 2006-08-17 22:00:08 +00:00
IA64RegisterInfo.h getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 2006-05-18 00:12:58 +00:00
IA64RegisterInfo.td Constify some methods. Patch provided by Anton Vayvod, thanks! 2006-08-17 22:00:08 +00:00
IA64TargetMachine.cpp Completely rearchitect the interface between targets and the pass manager. 2006-09-04 04:14:57 +00:00
IA64TargetMachine.h Completely rearchitect the interface between targets and the pass manager. 2006-09-04 04:14:57 +00:00
Makefile DAG->DAG instruction selection for ia64! "hello world" works, not much else. 2005-10-28 17:46:35 +00:00
README heh, scheduling was easy? 2005-11-01 05:49:08 +00:00

README 

*** README for the LLVM IA64 Backend "Version 0.01" - March 18, 2005
*** Quote for this version:

      "Kaori and Hitomi are naughty!!"


Congratulations, you have found:

**************************************************************** 
* @@@       @@@       @@@  @@@  @@@@@@@@@@                     *
* @@@       @@@       @@@  @@@  @@@@@@@@@@@                    *
* @@!       @@!       @@!  @@@  @@! @@! @@!                    *
* !@!       !@!       !@!  @!@  !@! !@! !@!                    *
* @!!       @!!       @!@  !@!  @!! !!@ @!@                    *
* !!!       !!!       !@!  !!!  !@!   ! !@!                    *
* !!:       !!:       :!:  !!:  !!:     !!:                    *
*  :!:       :!:       ::!!:!   :!:     :!:                    *
*  :: ::::   :: ::::    ::::    :::     ::                     *
* : :: : :  : :: : :     :       :      :                      *
*                                                              *
*                                                              *
*  @@@@@@   @@@  @@@       @@@   @@@@@@     @@@@@@       @@@   *
* @@@@@@@@  @@@@ @@@       @@@  @@@@@@@@   @@@@@@@      @@@@   *
* @@!  @@@  @@!@!@@@       @@!  @@!  @@@  !@@          @@!@!   *
* !@!  @!@  !@!!@!@!       !@!  !@!  @!@  !@!         !@!!@!   *
* @!@  !@!  @!@ !!@!       !!@  @!@!@!@!  !!@@!@!    @!! @!!   *
* !@!  !!!  !@!  !!!       !!!  !!!@!!!!  @!!@!!!!  !!!  !@!   *
* !!:  !!!  !!:  !!!       !!:  !!:  !!!  !:!  !:!  :!!:!:!!:  *
* :!:  !:!  :!:  !:!       :!:  :!:  !:!  :!:  !:!  !:::!!:::  *
* ::::: ::   ::   ::        ::  ::   :::  :::: :::       :::   *
*  : :  :   ::    :        :     :   : :   :: : :        :::   *
*                                                              *
****************************************************************
* Bow down, bow down, before the power of IA64! Or be crushed, *
* be crushed, by its jolly registers of doom!!                 *
****************************************************************

DEVELOPMENT PLAN:

   _  you are       2005           maybe 2005       2006            2006 and
  /   here            |               |              |               beyond 
 v                    v               v              v                |
                                                                      v
CLEAN UP        ADD INSTRUCTION      ADD          PLAY WITH
INSTRUCTION --> SCHEDULING AND  -->  JIT    -->    DYNAMIC     --> FUTURE WORK
SELECTION       BUNDLING            SUPPORT     REOPTIMIZATION

DISCLAIMER AND PROMISE:

As of the time of this release, you are probably better off using Intel C/C++
or GCC. The performance of the code emitted right now is, in a word,
terrible. Check back in a few months - the story will be different then,
I guarantee it.

TODO:

  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - write truly inspirational documentation
  - if-conversion (predicate database/knowledge? etc etc)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:

  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:

  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:

  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:

  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.