Simon Tatham a41ecf0eb0 [ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family. ... Summary: These instructions work like VMOVN (narrowing a vector of wide values to half size, and overwriting every other lane of an output register with the result), except that the narrowing conversion is saturating. They come in three signedness flavours: signed to signed, unsigned to unsigned, and signed to unsigned. All are represented in IR by a target-specific intrinsic that takes two separate 'unsigned' flags. Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D75252		2020-03-02 10:33:30 +00:00
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llvm	[ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.	2020-03-02 10:33:30 +00:00
llvm-c	[LTO][Legacy] Add new API to query Mach-O CPU (sub)type	2020-02-28 12:56:05 -08:00