.. |
AArch64
|
[AArch64][SVE] Asm: Report SVE parsing diagnostics only once
|
2017-11-15 15:44:43 +00:00 |
AMDGPU
|
[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*
|
2017-11-17 15:15:40 +00:00 |
ARM
|
[ARM] Tighten up CHECK lines in a test
|
2017-10-24 14:20:13 +00:00 |
AVR
|
[AVR] Remove a bunch of now-obselete tests
|
2017-07-01 05:23:13 +00:00 |
AsmParser
|
Revert "[MC] Fix regression tests on Windows when git “core.autocrlf” is set to true."
|
2017-11-17 17:31:20 +00:00 |
BPF
|
bpf: print backward branch target properly
|
2017-11-16 19:15:36 +00:00 |
COFF
|
[codeview] Implement FPO data assembler directives
|
2017-10-11 21:24:33 +00:00 |
Disassembler
|
[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*
|
2017-11-17 15:15:40 +00:00 |
ELF
|
llvm-dwarfdump: Make -brief the default and add a -verbose option instead.
|
2017-09-11 23:05:20 +00:00 |
Hexagon
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
Lanai
|
[lanai] Add more tests for assembly of conditional ALU ops
|
2016-07-11 17:58:16 +00:00 |
MachO
|
[dwarfdump] Add verbose output for .debug-line section
|
2017-09-21 20:15:30 +00:00 |
Markup
|
…
|
|
Mips
|
[mips][mt] Add missing test cases from r318207
|
2017-11-16 10:50:44 +00:00 |
PowerPC
|
PowerPC: support the separator character in the IAS
|
2017-10-24 16:19:56 +00:00 |
RISCV
|
[RISCV] MC layer support for the standard RV32A instruction set extension
|
2017-11-09 15:00:03 +00:00 |
Sparc
|
[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
|
2017-07-25 15:28:28 +00:00 |
SystemZ
|
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
|
2017-07-18 09:17:00 +00:00 |
WebAssembly
|
[WebAssembly] MC: Don't allow zero sized data segments
|
2017-10-27 00:08:55 +00:00 |
X86
|
[X86] Limit NOPs to 7 bytes when 'slm' is spelled 'silvermont'.
|
2017-11-13 08:17:30 +00:00 |