llvm-project/llvm/test/Transforms/AggressiveInstCombine
Sanjay Patel ac3951a735 [AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare
This is a follow-up to D45986. As suggested there, we should match the "all-bits-set" 
pattern in addition to "any-bits-set".

This was a little more complicated than I thought it would be initially because the 
"and 1" instruction can be anywhere in the chain. Hopefully, the code comments make 
that logic understandable, but if you see a way to simplify or improve that, it's 
most appreciated.

This transforms patterns that emerge from bitfield tests as seen in PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

I think it would also help reduce the large test from:
D46336
D46595 
but we need something to reassociate that case to the forms we're expecting here first.

Differential Revision: https://reviews.llvm.org/D46649

llvm-svn: 331937
2018-05-09 23:08:15 +00:00
..
masked-cmp.ll [AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare 2018-05-09 23:08:15 +00:00
trunc_const_expr.ll [AggressiveInstCombine] Fixed TruncCombine class to handle TruncInst leaf node correctly. 2018-01-31 22:39:05 +00:00
trunc_multi_uses.ll [AggressiveInstCombine] Fixed TruncCombine class to handle TruncInst leaf node correctly. 2018-01-31 22:39:05 +00:00
trunc_unreachable_bb.ll [AggressiveInstCombine] Make TruncCombine class ignore unreachable basic blocks. 2018-01-31 10:41:31 +00:00