llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir

37 lines
1.1 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -march=amdgcn -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
define void @test_select() { ret void }
...
---
name: test_select
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
body: |
bb.0:
liveins: %vgpr0
; CHECK-LABEL: name: test_select
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY %vgpr0
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
%0(s32) = G_CONSTANT i32 0
%1(s32) = COPY %vgpr0
%2(s1) = G_ICMP intpred(ne), %0, %1
%3(s32) = G_CONSTANT i32 1
%4(s32) = G_CONSTANT i32 2
%5(s32) = G_SELECT %2, %3, %4
%vgpr0 = COPY %5
...