forked from OSchip/llvm-project
f61c29b3a7
Currently we delete optimized instructions as we go. That has several negative consequences. First it complicates traversal logic itself. Second if newly generated instruction has been deleted the traversal is repeated from scratch. But real motivation for the change is upcoming change with support for min/max reassociation. Here we employ SCEV expander to generate code. As a result newly generated instructions may be inserted not right before original instruction (because SCEV may do hoisting) and there is no way to know 'next' instruction. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D88285 |
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| NVPTX | ||
| nary-add.ll | ||
| nary-mul.ll | ||
| pr24301.ll | ||
| pr35710.ll | ||
| pr37539.ll | ||