Adhemerval Zanella f384bc7166 [AArch64] Improve cost of vector division by constant ... With custom lowering for vector MULLH{S,U}, it is now profitable to vectorize a divide by constant loop for the custom types (v16i8, v8i16, and v4i32). The cost if based on TargetLowering::Build{S,U}DIV which uses a multiply by constant plus adjustment to express a divide by constant. Both {u,s}mull{2} are expressed as Instruction::Mul and shifts by Instruction::AShr. llvm-svn: 331873		2018-05-09 12:48:22 +00:00
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AArch64	[AArch64] Improve cost of vector division by constant	2018-05-09 12:48:22 +00:00
AMDGPU	[AMDGPU] Switch to the new addr space mapping by default	2018-02-02 16:07:16 +00:00
ARM	Convert an APInt to int64_t properly in TTI::getGEPCost().	2017-10-04 20:47:33 +00:00
PowerPC	[PPC] Give unaligned memory access lower cost on processor that supports it	2017-02-17 22:29:39 +00:00
SystemZ	[SystemZ] Add support for IBM z14 processor (2/3)	2017-07-17 17:42:48 +00:00
X86	[CostModel][X86] Split off SLM checks	2018-05-09 11:42:34 +00:00
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