forked from OSchip/llvm-project
8446f24ef0
The revision uses tablegen generated builders to convert the most common LLVM IR instructions to MLIR LLVM dialect operations. All instructions with special handlers, except for alloca and fence, still use manual handlers. The revision also introduces an additional "instructions.ll" test file to test the import of instructions that have tablegen builders (except for the resume instruction whose test remains untouched). A part of the test cases are new, for example the integer instruction test, while others are migrated from the "basic.ll" test file. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D135709 |
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| .. | ||
| mlir-cpu-runner | ||
| mlir-linalg-ods-gen | ||
| mlir-lsp-server | ||
| mlir-opt | ||
| mlir-parser-fuzzer | ||
| mlir-pdll | ||
| mlir-pdll-lsp-server | ||
| mlir-reduce | ||
| mlir-shlib | ||
| mlir-spirv-cpu-runner | ||
| mlir-tblgen | ||
| mlir-translate | ||
| mlir-vulkan-runner | ||
| tblgen-lsp-server | ||
| CMakeLists.txt | ||